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Immibis Pinephone DRAM access tutorial on Wiki

Posted: Wed Aug 30, 2023 11:32 am
by Candy
Hi - hoping I can somehow ping @Immibis.

While reading through your DRAM initialization code I noticed that all registers are in the 0x01c2 and 0x01c6 blocks, but one register is written at 0x016C3104? This looks like a typo, maybe this helps stability? Or is this intentional?

Re: Immibis Pinephone DRAM access tutorial on Wiki

Posted: Wed Aug 30, 2023 10:54 pm
by Octocontrabass
Candy wrote:Hi - hoping I can somehow ping @Immibis.
Try sending a private message. This version of phpBB is way too old for any of that Web 2.0 @ notification business.
Candy wrote:While reading through your DRAM initialization code I noticed that all registers are in the 0x01c2 and 0x01c6 blocks, but one register is written at 0x016C3104? This looks like a typo, maybe this helps stability? Or is this intentional?
I don't see U-Boot poking anything near that address, and I do see U-Boot poking the register at 0x01C63104 with a similar value, so I'd say that's a typo. Unfortunately, it doesn't look like Allwinner ever published complete documentation for the A64 DRAM controller, so you'd have to dig up a datasheet for a similar SOC to figure out what any of those values actually mean. (According to U-Boot, that includes the H3, H5, R40, V3s, and probably a few others.) You could also try reverse-engineering Allwinner's DRAM initialization code, since that seems to be what the U-Boot authors did.

Re: Immibis Pinephone DRAM access tutorial on Wiki

Posted: Sat Sep 16, 2023 6:50 am
by immibis
I got the private message - in my spam folder. The code on the wiki is also the code on my hard drive that I tried on my pinephone and seemed to work, but this address is probably a typo. I added a comment because the code is known to work and the effects of changing it are not known.

Please remember that the wiki is a wiki, and if you have new information to add, you are welcome to add it.