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Hi guys! I have 3 PCI devices inserted into pci slot. My OS is using the old PIC mode. And I checked the PCI IRQLine all these devices are using IRQ5. I want these 3 devices not to share the same IRQ number.

1. is it possible to change PCI IRQ? my understanding is at old PIC mode the interrupt goes from PCI device to PIC(8259A) and then goes to CPU. it will skip both the IO APIC and Local APIC, so no way to change , right?

2. another way is to make MSI/MSI-X working. So I enable the MSI control bit , write 0xFEE00000 to Message address(only 1 cpu is used), 0x26 to Message Data(I guess IRQ6 is 0x26) , install interrupt handler to IRQ6. But when interrupt happens the handler is not called. So I change the address to a RAM address, and I say the value 0x26 is written. I am sure that the MSI is working on the PCI side, but it is not working on CPU side. Does the Local APIC is not enabled under old PIC mode? if it is true, how to enable it?



I am using RTEMS/i386, the link is here(https://github.com/RTEMS/rtems/tree/mas ... i386/pc386).

marcrew wrote:1. is it possible to change PCI IRQ?

Sometimes, yes.

If a device can be routed to different IRQs, you can enumerate them using the ACPI _PRS method and select one using the ACPI _SRS method. Note that you must first call _PIC to specify whether you're using APIC or legacy PIC.

If you're not using ACPI or APIC, you can use PCI BIOS calls to route PCI IRQs. There's also an optional PCI IRQ Routing Table in the BIOS ROM that may be useful as a complement to the PCI BIOS calls.

marcrew wrote:(I guess IRQ6 is 0x26)

Don't guess. Also, if you choose an interrupt vector that's already assigned to a different interrupt controller, you'll have to examine the in-service register to determine which interrupt controller received the interrupt request.

marcrew wrote:Does the Local APIC is not enabled under old PIC mode?

Maybe!

marcrew wrote:if it is true, how to enable it?

There are two bits that must be set to enable the APIC. One is in IA32_APIC_BASE_MSR, the other is in the APIC's own SVR. However, firmware does not expect the APIC and the legacy PICs to be used at the same time, so firmware may misbehave if you don't also disable the legacy PICs, and firmware tables that describe interrupt routing may not tell you how the legacy PICs can be routed through the APIC.

I think that if a system has an APIC it should be enabled and the legacy PIC should be disabled.

I would only use ACPI for systems that has an APIC, and I would not trust that older computers with only legacy PIC has a functional ACPI.