The Place to Start for Operating System Developers
http://f.osdev.org/
What are you expecting to see?HJVT wrote:Reading register A always yields 00100000
When the lowest four bits of register A are set to 0b0000, the RTC periodic IRQ is disabled. You need to write a different value to those bits to enable the IRQ.HJVT wrote:IRQ8 despite being enabled and unmasked never fires
You need to interpret the values differently according to register B. For example, if register B says BCD 12-hour time, then 0x84 in the hours register means 4 PM.HJVT wrote:and reading time yields values like 84:65
I am expecting the update bit to change. Although I am only reading time on PIT interrupts.Octocontrabass wrote:What are you expecting to see?
I am initialising the RTC in the way the wiki describes:Octocontrabass wrote:When the lowest four bits of register A are set to 0b0000, the RTC periodic IRQ is disabled. You need to write a different value to those bits to enable the IRQ.
Code: Select all
port0x70.write(0x8Au8);
port0x71.write(0x20u8);
port0x70.write(0x8Bu8);
let prev = port0x71.read();
port0x70.write(0x8Bu8);
port0x71.write(prev | 0x40);That could explain what I'm seeing, but I am not reading hours, only minutes and seconds:Octocontrabass wrote:You need to interpret the values differently according to register B. For example, if register B says BCD 12-hour time, then 0x84 in the hours register means 4 PM.
Code: Select all
port0x70.write(0x8Au8);
let update: u8 = port0x71.read();
if (update & (1 << 6)) == 0 {
let time = unsafe {
port0x70.write(0x80);
let sec = port0x71.read();
port0x70.write(0x82);
let min = port0x71.read();
format!("{:02}:{:02}", min, sec)
};
}
That's probably not often enough to catch it, but it doesn't help that you're doing it in a VM. Actual hardware usually has separate clock sources for the RTC and the PIT, but on a VM the two might use the same clock source and therefore never drift relative to each other.HJVT wrote:I am expecting the update bit to change. Although I am only reading time on PIT interrupts.
There's no one proofreading the wiki, so it doesn't do a very good job of explaining that setting register A is not part of the initialization sequence. (Although maybe it should be - is there any guarantee the firmware will always set register A to 0x26?)HJVT wrote:I'm unsure why the wiki claims that this will result in periodic interrupt being enabled?
It's BCD. 84 is 0x54 and 65 is 0x41, so the time is 54:41.HJVT wrote:That could explain what I'm seeing, but I am not reading hours, only minutes and seconds:
I see. With setting A to 0x26 I now receive an interrupt, a single one, despite reading register C on interrupt which is supposed to signal to RTC that interrupt has been handled and it is okay to send another one:Octocontrabass wrote:There's no one proofreading the wiki, so it doesn't do a very good job of explaining that setting register A is not part of the initialization sequence. (Although maybe it should be - is there any guarantee the firmware will always set register A to 0x26?)
However, the wiki only mentions register C as related to time on the RTC page, the CMOS page doesn't mention this register at all, despite listing out other time-related registers.It is important to know that upon a IRQ 8, Status Register C will contain a bitmask telling which interrupt happened. The RTC is capable of producing a periodic interrupt (what this article describes), an update ended interrupt, and an alarm interrupt. If you are only using the RTC as a simple timer this is not important. What is important is that if register C is not read after an IRQ 8, then the interrupt will not happen again.
Did you also acknowledge the interrupt in the interrupt controller(s)?HJVT wrote:I see. With setting A to 0x26 I now receive an interrupt, a single one, despite reading register C on interrupt which is supposed to signal to RTC that interrupt has been handled and it is okay to send another one:
Oh, totally forgot that.Octocontrabass wrote:Did you also acknowledge the interrupt in the interrupt controller(s)?