8259 PIC special mask mode
Posted: Wed Apr 14, 2021 11:47 am
Is there any way with 8259s to implement a custom interrupt priority order?
To illustrate what I mean, one could consider the PC/AT's normal, standard priority order to be
0 - PIT
1 - Keyboard
8...15 - RTC and rest of slave PIC
3 - Serial port
4 - Serial port
5...7 - Rest of master PIC
I'd prefer something like
0 - PIT
8 - RTC
3 - Serial port
4 - Serial port
Everything else
In other words, timers then serial ports then the rest.
You may prefer a different order but is there any way to achieve it?
That's where I'm wondering if special mask mode might help. I've read the description of it in the datasheet more than once before but never understood it. I still don't even now. :-(
But on reading it again it sounds as though it /might/ be usable for such custom prioritisation.
The Intel 8259A datasheet says this about it:
"Special Mask Mode
"Some applications may require an interrupt service routine to dynamically alter the system priority structure during its execution under software control. For example, the routine may wish to inhibit lower priority requests for a portion of its execution but enable some of them for another portion.
"The difficulty here is that if an Interrupt Request is acknowledged and an End of Interrupt command did not reset its IS bit (i.e., while executing a service routine), the 8259A would have inhibited all lower priority requests with no easy way for the routine to enable them.
"That is where the Special Mask Mode comes in. In the special Mask Mode, when a mask bit is set in OCW1, it inhibits further interrupts at that level and enables interrupts from all other levels (lower as well as higher) that are not masked. Thus, any interrupts may be selectively enabled by loading the mask register."
See what I mean? It sounds as thought special mask mode might allow custom priorities (and more) through judicious masking of interrupts.
How does it look to you and do you know of any other way to effect custom interrupt priorities such as those I mentioned at the outset?
To illustrate what I mean, one could consider the PC/AT's normal, standard priority order to be
0 - PIT
1 - Keyboard
8...15 - RTC and rest of slave PIC
3 - Serial port
4 - Serial port
5...7 - Rest of master PIC
I'd prefer something like
0 - PIT
8 - RTC
3 - Serial port
4 - Serial port
Everything else
In other words, timers then serial ports then the rest.
You may prefer a different order but is there any way to achieve it?
That's where I'm wondering if special mask mode might help. I've read the description of it in the datasheet more than once before but never understood it. I still don't even now. :-(
But on reading it again it sounds as though it /might/ be usable for such custom prioritisation.
The Intel 8259A datasheet says this about it:
"Special Mask Mode
"Some applications may require an interrupt service routine to dynamically alter the system priority structure during its execution under software control. For example, the routine may wish to inhibit lower priority requests for a portion of its execution but enable some of them for another portion.
"The difficulty here is that if an Interrupt Request is acknowledged and an End of Interrupt command did not reset its IS bit (i.e., while executing a service routine), the 8259A would have inhibited all lower priority requests with no easy way for the routine to enable them.
"That is where the Special Mask Mode comes in. In the special Mask Mode, when a mask bit is set in OCW1, it inhibits further interrupts at that level and enables interrupts from all other levels (lower as well as higher) that are not masked. Thus, any interrupts may be selectively enabled by loading the mask register."
See what I mean? It sounds as thought special mask mode might allow custom priorities (and more) through judicious masking of interrupts.
How does it look to you and do you know of any other way to effect custom interrupt priorities such as those I mentioned at the outset?