Also, I was planned on using a cross-compiler. (The cross-compiler has built libgcc with -mno-red-zone).
You can find my old Makefile, which compiled my kernel to about 175KiB (with debug symbols) in my microCORE link in signature.
This is my new Makefile:
Code: Select all
SRCDIR = src
BINDIR = bin
OBJDIR = bin/obj
CXXSRC = $(call rwildcard,$(SRCDIR),*.cxx)
ASMSRC = $(call rwildcard,$(SRCDIR),*.asm)
LDS = microCORE.lds
OBJS = $(patsubst $(SRCDIR)/%.cxx, $(OBJDIR)/%.cxx.o, $(CXXSRC))
OBJS += $(patsubst $(SRCDIR)/%.asm, $(OBJDIR)/%.asm.o, $(ASMSRC))
rwildcard=$(foreach d,$(wildcard $(1:=/*)),$(call rwildcard,$d,$2) $(filter $(subst *,%,$2),$d))
CXXC = x86_64-elf-gcc
ASMC = nasm
CFLAGS = -ffreestanding -I$(SRCDIR) -std=gnu++17 -gdwarf -O0 -mno-red-zone -msse2 -fno-threadsafe-statics
LFLAGS = -ffreestanding -nostdlib -mno-red-zone -lgcc -T $(LDS)
AFLAGS = -f elf64 -g -F dwarf
.DEFAULT-GOAL = all
$(OBJDIR)/%.cxx.o: $(SRCDIR)/%.cxx
@ echo "=={+-}===>>> COMPILING $^"
@ mkdir -p $(@D)
@ $(CXXC) $(CFLAGS) -c $^ -o $@
$(OBJDIR)/%.asm.o: $(SRCDIR)/%.asm
@ echo "=={+-}===>>> ASSEMBLING $^"
@ mkdir -p $(@D)
@ $(ASMC) $(AFLAGS) $^ -o $@
kernel: $(OBJS)
@ echo "=={+-}===>>> LINKING bin/microCORE.kernel"
@ $(CXXC) $(LFLAGS) $(OBJS) -o $(BINDIR)/microCORE.kernel
all: kernel
clean:
@ rm -rf bin
I ensured that I wasn't linking duplicate objects.
This is important because my kernel is supposed to be small and performant, not bloated.
Also, if I'm taking up 10x the space with 1x the code, that is a waste of memory.
Does anyone know why this is occurring?
EDIT: I realized that the linker script is also important here:
Code: Select all
ENTRY(kernel_entry)
SECTIONS
{
. = 1M;
_kernel_start = .;
.stivalehdr :
{
KEEP(*(.stivalehdr))
}
.text :
{
*(.text .text.*)
}
.rodata :
{
*(.rodata .rodata.*)
}
.data :
{
*(.data.rel.ro.local*) *(.data.rel.ro .data.rel.ro.*) *(.data.*)
}
.bss :
{
*(.bss .bss.*);
}
. = ALIGN(4K);
.userspace :
{
*(.userspace);
}
_kernel_end = .;
}