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#ifndef SYSTEM_TIMER
#define SYSTEM_TIMER

#include <stdint.h>

#define PIT_BASE_FREQ       1193180

#define PIT_CHANNEL_0       0x40
#define PIT_CHANNEL_1       0x41
#define PIT_CHANNEL_2       0x42
#define PIT_CMD_PORT        0x43

// Technically these "__cplusplus" aren't needed here so I'll be removing them.
#if defined(__cplusplus)
extern "C" {
#endif

void pit_init(uint32_t fq);

#if defined(__cplusplus)
}
#endif

#endif	// !SYSTEM_TIMER

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#include <kernel/pit.h>
#include <kernel/isr.h>
#include <kernel/system/terminal.h>
#include <kernel/system/io.h>

uint32_t tick;

static void
timer_callback(registers_t regs)
{
	tick++;
	terminal_printf("Ticks: %d\n", tick);
}

void
pit_init(uint32_t freq)
{
	//terminal_printf("[INFO]: PIT is initialized!\n");

	register_interrupt_handler(IRQ0, &timer_callback);
	uint32_t divisor = 1193180 / freq;
	outb(0x43, 0x36);

	uint8_t l = (uint8_t)(divisor & 0xFF);
	uint8_t h = (uint8_t)((divisor >> 8) & 0xFF);

	outb(0x40, l);
	outb(0x40, h);
}

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%macro ISR_NOERRCODE 1
  global isr%1
  isr%1:
    cli
    push byte 0                 ; Push a dummy error code.
    push byte %1                     ; Push the interrupt number.
    jmp isr_common_stub         ; Go to our common handler code.
%endmacro

; This macro creates a stub for an ISR which passes it's own
; error code.
%macro ISR_ERRCODE 1
  global isr%1
  isr%1:
    cli
    push byte %1                     ; Push the interrupt number
    jmp isr_common_stub
%endmacro

%macro IRQ 2
  global irq%1
  irq%1:
    cli
	  push byte 0
	  push byte %2
	  jmp irq_common_stub
%endmacro

ISR_NOERRCODE   0
ISR_NOERRCODE 	1
ISR_NOERRCODE 	2
ISR_NOERRCODE	  3
ISR_NOERRCODE	  4
ISR_NOERRCODE	  5
ISR_NOERRCODE	  6
ISR_NOERRCODE	  7
ISR_ERRCODE   	8
ISR_NOERRCODE	  9
ISR_ERRCODE   	10
ISR_ERRCODE   	11
ISR_ERRCODE   	12
ISR_ERRCODE   	13
ISR_ERRCODE   	14
ISR_NOERRCODE	  15
ISR_NOERRCODE	  16
ISR_NOERRCODE	  17
ISR_NOERRCODE	  18
ISR_NOERRCODE	  19
ISR_NOERRCODE	  20
ISR_NOERRCODE	  21
ISR_NOERRCODE	  22
ISR_NOERRCODE	  23
ISR_NOERRCODE	  24
ISR_NOERRCODE	  25
ISR_NOERRCODE	  26
ISR_NOERRCODE	  27
ISR_NOERRCODE	  28
ISR_NOERRCODE   29
ISR_NOERRCODE	  30
ISR_NOERRCODE	  31
IRQ	0, 32
IRQ	1, 33
IRQ	2, 34
IRQ	3, 35
IRQ	4, 36
IRQ	5, 37
IRQ	6, 38
IRQ	7, 39
IRQ	8, 40
IRQ	9, 41
IRQ	10, 42
IRQ	11, 43
IRQ	12, 44
IRQ	13, 45
IRQ	14, 46
IRQ	15, 47

; This is our common ISR stub. It saves the processor state, sets
; up for kernel mode segments, calls the C-level fault handler,
; and finally restores the stack frame.
extern isr_handler              ; In isr.c

isr_common_stub:
    pusha                       ; Pushes edi,esi,ebp,esp,ebx,edx,ecx,eax

    mov ax, ds                  ; Lower 16-bits of eax = ds.
    push eax                    ; save the data segment descriptor

    mov ax, 0x10                ; load the kernel data segment descriptor
    mov ds, ax
    mov es, ax
    mov fs, ax
    mov gs, ax

    call isr_handler

	  pop ebx
	  mov ds, bx
	  mov es, bx
	  mov fs, bx
	  mov gs, bx

    popa                        ; Pops edi,esi,ebp...
    add esp, 8                  ; Cleans up the pushed error code and pushed ISR number
    sti
    iret

extern irq_handler

irq_common_stub:
	  pusha
	
	  mov ax, ds
	  push eax
	
	  mov ax, 0x10
	  mov ds, ax
	  mov es, ax
	  mov fs, ax
	  mov gs, ax
	
	  call irq_handler
	
	  pop ebx
	  mov ds, bx
	  mov es, bx
	  mov fs, bx
	  mov gs, bx
	
	  popa
	  add esp, 8
    sti
	  iret

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uint32_t tick;

static void
timer_callback(registers_t regs)
{
	tick++;
	terminal_printf("Ticks: %d\n", tick);
}

void
pit_init(uint32_t freq)
{
	//terminal_printf("[INFO]: PIT is initialized!\n");

	register_interrupt_handler(IRQ0, &timer_callback);
	uint32_t divisor = 1193180 / freq;
	outb(0x43, 0x36);

	uint8_t l = (uint8_t)(divisor & 0xFF);
	uint8_t h = (uint8_t)((divisor >> 8) & 0xFF);

	outb(0x40, l);
	outb(0x40, h);

        pic_send_eoi();     // outb(0x20, 0x20);
}

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void 
irq_handler(registers_t regs) 
{
	if (regs.int_no >= 40) 
	{
		outb(0xA0, 0x20);
	}
	outb(0x20, 0x20);	/* EOI */
	
	if (interrupt_handlers[regs.int_no] != 0) 
	{
		isr_t handler = interrupt_handlers[regs.int_no];
		handler(regs);
	}
}