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Posted: **Sun Oct 04, 2020 9:39 am**

Hello,
I have an issue about making my 64-bit kernel and bootstrap map address 0xB8000 to 0xFFFFFFFF800B8000.
I would say my issue is more of a misunderstanding (or straight up not understanding) of the paging system.

This is the current state of my code.

Code: Select all

__rt0_64:
    cli

    ;--------------------------------------
    ; Nullifies the segment registers.
    ;--------------------------------------
    mov ax, 0
    mov ds, ax
    mov es, ax
    mov fs, ax
    mov gs, ax
    mov ss, ax

    ;-; what do?

.stop:
    ;--------------------------------------
    ; Blocks interrupts and halts.
    ;--------------------------------------
    cli

I have tried using the code below but quickly realized I was just overwriting two entries with the "0xFFFFFFFF80000003" value.

Code: Select all

 mov rbx, 0xFFFFFFFF80000003
    mov ecx, 512

.identity_map:
    ;--------------------------------------
    ; Identity maps the first 2MB.
    ;--------------------------------------
    mov qword [edi], rbx
    add rbx, 0x1000
    add edi, 8
    loop __rt0_64.identity_map

    mov dword [0xFFFFFFFF800B8000], 0xf0f0f0f0

I have struggled to find an answer for this problem and this topic in general.

I will provide any necessary information if asked.

Any and all help is appreciated
Thank you

Posted: **Sun Oct 04, 2020 10:41 am**

This is just a suggestion on my part, but if you've never implemented 32-bit paging before, I'd start there. 64-bit paging builds on the same concepts, but if you don't have the basics mastered, you're making things much, much harder for yourself.

Get yourself into 32-bit protected mode without paging, build a simple page table that maps the lower couple of MB of memory both at linear range 0x0 and a high-load range (say, 0xf0000000+), enable paging, then jump into the high-load space. If you can get that working, you'll have a good grasp of the basics.

Posted: **Sun Oct 04, 2020 11:07 am**

Thanks for your reply, I will experiment with mapping 32 bit code to 0xC0000000 like I saw in the x86 Higher Half tutorial.
I still want to pursue this goal on the side though, would you recommend any sources or have suggestions alongside this one?

Posted: **Sun Oct 04, 2020 2:01 pm**

To be honest, I think once you understand two-level paging in 32-bit mode well enough, going to four-level paging will be a snap. It's the same concepts, just more of it. There's a few differences, like 512 8-byte entries per table instead of 1024 4-byte entries. You also have to use canonical addresses, but if your high-load addresses start with 0xffff8 through 0xfffff, then there's no issue.

In fact, I found getting into 64-bit mode a little harder to get right, because you have to have paging set up correctly to enable it. In 32-bit, you can enable PE without paging, then set up the tables and enable PG.

Posted: **Sun Oct 04, 2020 4:23 pm**

Hmm, I understand. Anyways thanks for the help man appreciate it.

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