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triple fault when enabling paging

Posted: Tue Sep 08, 2020 7:51 pm
by clementttttttttt
I modified the page table setup code a bit to make it identity map the kernel. However, it crashes instantly when I try to set the paging bit in cr0. Here's my code:

Code: Select all

paging:
    mov esi,0
    mov ecx,1024
.1:
    cmp esi,_kernel_start
    jl .2
    cmp esi,_kernel_end
    jge .3
    mov edx,esi
    or edx,3
    mov [edi],edx
.2:
    add esi,4096
    add edi,4
    loop .1
.3:
    mov dword [boot_page_directory],(boot_page_table1+3)
    mov dword [boot_page_directory+(768*4)],(boot_page_table1+0x3)
    mov ecx,boot_page_directory
    mov cr3,ecx
    mov ecx,cr0
    or ecx,0x80010000
    mov cr0,ecx 
    jmp $ ;cr2 pointed to this. replaced with hlt, still the same.

and the register contents are:
cr0=0xe0010011
cr2=0x001010d1
cr3=0x105000
cr4=0
Also, how do I find the corresponding code in my assembly source from the cr2 register?

Re: triple fault when enabling paging

Posted: Tue Sep 08, 2020 8:21 pm
by Octocontrabass
Do "_kernel_start" and "_kernel_end" span a range of addresses that include the MOV to CR0 and the subsequent JMP that are used to enable paging?

I believe objdump will show you addresses that you can match to CR2, but in this case it's safe to say the fault is happening at the JMP instruction.

Re: triple fault when enabling paging

Posted: Tue Sep 08, 2020 8:44 pm
by clementttttttttt
_kernel_start and _kernel_end includes the .text section. Also, I replaced the jmp with hlt, and cr2 still points to 0x1010d1.

Re: triple fault when enabling paging

Posted: Tue Sep 08, 2020 8:59 pm
by Octocontrabass
Is the code you posted in the .text section?

I'd expect the HLT instruction is located at the same address as the JMP instruction you replaced, so CR2 won't change.

Re: triple fault when enabling paging

Posted: Tue Sep 08, 2020 9:00 pm
by clementttttttttt
Yes, the code is in the .text section.
edit: problem solved, I used the code from "Setting up paging" instead.