newbie questions about paging

[PeterX]

Some questions about paging:

1.) Can the page directory point directly to a page? (Or only to page tables?)

2.) In the page directory's definition there is size only 4KiB or 4MiB?

3.) The bit 0 in CR0 is already set when the long mode is entered, right?
So why do we have to OR this bit when enabling paging? Like it is done in the paging wiki page:

Code: Select all

 mov eax, cr0
 or eax, 0x80000001
 mov cr0, eax

Greetings
Peter

[foliagecanine]

1) I've been corrected.

No. (As far as I know) A page directory must point to a page table. The reason for this is that a page directory must cover 0x00000000 to 0xFFFFFFFF. If you do 1024*1024*4096, what do you get? 0x100000000 (aka 0x00000000 to 0xFFFFFFFF). However, you don't have to assign all the values in the page directory. A simple page directory can point to one page table with the rest of the entries without the present bit set. Then you would have one page table that defines a certain area in the physical memory.

See other answers for info about 4MiB pages

2) As far as I know, yes (at least with 32 bit mode).

3) I don't have much experience with long mode, so I can't help you much here. However, from the wiki, bit 0 is the protected mode enable bit. I would assume that you would only need to OR it if you were jumping straight from real mode to long mode. There's no harm in ORing it if it's already set, though.

[nexos]

First off, some terms definition. In 32 bit mode, a page directory is an array of 1024 PDEs. Each PDE contains attributes and the physical address of a page table. A page table manages a 4MB piece of address space. A page table is an array of 1024 PTE. A PTE does the same job as a PDE, except it points to a 4KB page. Now to answer questions:
1.) Depends. A PDE can point to either, based on the size bit in it. If the size bit of a PDE is set, it points to a 4MB page directly. Else, it points to a page table.
2.) In vanilla 32 bit paging, yes. Things are different in PAE and long mode, and I can explain the differences if you wish.
3.) Generally, no. Long mode is normally entered with the PG bit not set. The LME is set in the EFER MSR, and then the PG bit is set to activate paging.

[nullplan]

1.) Can the page directory point directly to a page? (Or only to page tables?)

Yes. That would be the 4MB paging you talk about later.

2.) In the page directory's definition there is size only 4KiB or 4MiB?

Well, if you are operating in long mode, you can get 4KB, 2MB, or 1GB.

3.) The bit 0 in CR0 is already set when the long mode is entered, right?
So why do we have to OR this bit when enabling paging?

Because it doesn't hurt. You have to load CR0 anyway, the OR instruction takes the same amount of time and space either way, so might as well set PE. My guess is that this is a left over from a test for entering long mode directly. When AMD64 was still new and fresh, a couple of hackers on this board noticed that it is possible on real implementations to switch directly from real mode to long mode by just skipping the protected mode step in the middle. And while that was technically possible, it was out-of-spec, so I never implemented that, and neither did some others. Plus, you only save a couple of instructions in the SMP trampoline. You don't save anything in the legacy multiboot path, since there, you already are in 32-bit mode by the time you gain control, and you don't save anything in the UEFI path, either, since there you are already in 64-bit mode. So this possibility was only ever of use for SMP trampolines and hand-rolled bootloaders.