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PCI questions
Posted: Wed Aug 05, 2020 6:34 am
by nexos
Hello,
I am currently making a PCI bus driver. I have a few questions however.
How do I read the PCI BARs? I know they are in the configuration space, but since they are DWORDs, how do read them.
How do I figure out what IO APIC line INTA, INTB, INTC, and INTD are without ACPI?
Do I need to enable PCI IRQs explicitly? If so, how do you do it?
And lastly, how do you work with the PCI Busmastering DMA?
Thanks,
nexos
Re: PCI questions
Posted: Wed Aug 05, 2020 7:39 am
by bellezzasolo
nexos wrote:Hello,
I am currently making a PCI bus driver. I have a few questions however.
How do I read the PCI BARs? I know they are in the configuration space, but since they are DWORDs, how do read them.
How do I figure out what IO APIC line INTA, INTB, INTC, and INTD are without ACPI?
Do I need to enable PCI IRQs explicitly? If so, how do you do it?
And lastly, how do you work with the PCI Busmastering DMA?
Thanks,
nexos
For BARs - Read configuration space as a DWORD.
Figuring out IO APIC lines without ACPI? Basically, you don't. You need an AML interpreter to get the correct mappings.
Or, you take my approach, and just use MSI(X) instead
For IRQs, you need to unmask bit 10 of Command/Status to enable pinned interrupts. For MSI, it's a bit of the MSI control register.
Set Bits 1 and 2 of Command/Status to enable memory access and bus mastering.
My PCI(E) code
Re: PCI questions
Posted: Wed Aug 05, 2020 7:47 am
by iansjack
nexos wrote:
How do I read the PCI BARs? I know they are in the configuration space, but since they are DWORDs, how do read them.
I'm not sure that I understand your problem. You just do a dword "in" to %eax.
Re: PCI questions
Posted: Wed Aug 05, 2020 12:53 pm
by Octocontrabass
nexos wrote:How do I figure out what IO APIC line INTA, INTB, INTC, and INTD are without ACPI?
On ancient hardware (and VMs that can run OSes that work on ancient hardware) you can use the MP tables.
Re: PCI questions
Posted: Wed Aug 05, 2020 2:46 pm
by nexos
Thanks for your answers. I now have an understanding of PCI and have decided to use MSI in my Operating System.
Re: PCI questions
Posted: Thu Aug 06, 2020 11:14 am
by nexos
I have managed to make the PCI bus driver, but what is a simple PCI device I can program to test stuff like IRQs, BAR mapping, MSI, and Busmastering?
Re: PCI questions
Posted: Thu Aug 06, 2020 11:20 am
by bellezzasolo
nexos wrote:I have managed to make the PCI bus driver, but what is a simple PCI device I can program to test stuff like IRQs, BAR mapping, MSI, and Busmastering?
Dare I say it, xHCI?
Not simple by any means, but it's not hard to test the IRQs and such. A "simple" device descriptor request tests bus mastering.
I'm currently working on an i219[v] driver, because I figure that'll be simpler than implementing a full USB stack for keyboard support, but I haven't tested bus mastering yet. BAR mapping and MSI work though.
Re: PCI questions
Posted: Fri Aug 07, 2020 7:20 am
by nexos
So in my BAR obtaining code, it appears that MMIO and IO Space regions are backwards. MMIO regions are set to be IO space and regions, and vice versa. The code that figures whether the BAR represents MMIO looks like this
Is that correct?
Re: PCI questions
Posted: Fri Aug 07, 2020 10:35 am
by thewrongchristian
nexos wrote:So in my BAR obtaining code, it appears that MMIO and IO Space regions are backwards. MMIO regions are set to be IO space and regions, and vice versa. The code that figures whether the BAR represents MMIO looks like this
Is that correct?
The lowest bit of the BAR is 1 if this is an IO address space BAR.
Your code looks like it should work, if barLow is a MMIO address, its LSB will be 0, !barLow LSB will be 1, and so isMmio will be non-zero (true). Have you inverted the test later on by accident?
I would find this test easier, though in the form:
Re: PCI questions
Posted: Fri Aug 07, 2020 1:17 pm
by nexos
I have finished my PCI host controller driver. Thanks for all your help during its development.
nexos
Re: PCI questions
Posted: Fri Aug 07, 2020 6:37 pm
by Octocontrabass
nexos wrote:
Is that correct?
You forgot parentheses.