All about PCI
Posted: Mon Jul 06, 2020 6:38 am
You can consider me a computer hardware newbie here: Compared to most members in this forum, I wasn't even born when PCI was (and still is) ruling the lands. I want to know, at an abstract level, what PCI/PCIe does.
I have read https://www.tldp.org/LDP/tlk/dd/pci.html, as well as the osdev wiki pages to try understand PCI/PCIe. However, often I find that most resources focus on the CPU view of PCI.
I want to 'see' the world through the eyes of the PCI bus, i.e. an introduction to the interfaces provided by PCI bus, so that I'd be well equipped to read the specification if I want extremely specific knowledge.
Here's my understanding so far:
1. A PCI/PCIe bus can be thought of as an entity to which devices can be connected. (I don't think it is necessary that a CPU must be connected, and can just be thought of as just another device?)
2. Each PCI bus has a special device that controls the PCI bus?
3. Every device connected to the PCI bus has private memory. If we think of the CPU also as a device, this would be RAM?
4. There is something called configuration space too, but I'm not sure if this is per-device (that is connected to the PCI bus) or per-bus.
I'm sure I have a lot of flaws in my understanding. What I'd like to know from this discussion is a mental picture of PCI, from which I can build the specifics by reading the spec/any other wiki.
I have read https://www.tldp.org/LDP/tlk/dd/pci.html, as well as the osdev wiki pages to try understand PCI/PCIe. However, often I find that most resources focus on the CPU view of PCI.
I want to 'see' the world through the eyes of the PCI bus, i.e. an introduction to the interfaces provided by PCI bus, so that I'd be well equipped to read the specification if I want extremely specific knowledge.
Here's my understanding so far:
1. A PCI/PCIe bus can be thought of as an entity to which devices can be connected. (I don't think it is necessary that a CPU must be connected, and can just be thought of as just another device?)
2. Each PCI bus has a special device that controls the PCI bus?
3. Every device connected to the PCI bus has private memory. If we think of the CPU also as a device, this would be RAM?
4. There is something called configuration space too, but I'm not sure if this is per-device (that is connected to the PCI bus) or per-bus.
I'm sure I have a lot of flaws in my understanding. What I'd like to know from this discussion is a mental picture of PCI, from which I can build the specifics by reading the spec/any other wiki.