ARM MMU Large descriptor problems
Posted: Sun Jun 07, 2020 11:37 am
Hello, i was trying to set up a fairly simple translation table (not one of the memory layout i will probably use, just a basic test one) that identity maps 0x80000000 and above with 1gb blocks (so only 1 table). However when enabling the MMU i get into a nice loop of prefetch aborts as the cpu cannot access any ram anywhere for some reason.
I have already checked the aligment of the table (i already made a very simple page allocater, so i looped that until i get the correct alignment, not anywhere near ideal but when it works i can make it better). My start.s sets the not-secure bit on boot. Using GDB with qemu i have already confirmed the registers get set correctly.
GDB dump of the first 4 entries of the translation table:
and relavent (i think) registers: (before enabling mmu by setting bit 0 in sctlr)
I have already checked the aligment of the table (i already made a very simple page allocater, so i looped that until i get the correct alignment, not anywhere near ideal but when it works i can make it better). My start.s sets the not-secure bit on boot. Using GDB with qemu i have already confirmed the registers get set correctly.
GDB dump of the first 4 entries of the translation table:
Code: Select all
0x800f8000: 0x00000000 // base of translation table
0x800f8004: 0x00000000
0x800f8008: 0x00000000
0x800f800c: 0x00000000
0x800f8010: 0x00000000 // block 2
0x800f8014: 0x80000441
0x800f8018: 0x00000000 // block 3
0x800f801c: 0xc0000441
Code: Select all
TTBCR 0x80000000
TTBR0 0x800f8000 // maybe i am missing a bit here?
SCTLR 0xc50078