GDT after enabling paging
Posted: Sat Jun 06, 2020 8:18 am
Hi, I recently moved my kernel into higher half.
However, since my GDT is stored in the first megabyte (generated by my bootloader) after enabling paging that address refers to a page (directory) that is not present.
So I'm now creating a new GDT in the entrypoint of my kernel.
Here are a few questions that I have:
1. Why does having an invalid GDT pointer only triple fault whenever an IRQ happens and not when executing random code, even with jmps in it?
(if I don't ever do sti it seems to work fine on all virtual machines i've tested on: VMWare, bochs, qemu)
2. When is GDT actually accessed by the CPU and how far can you go with it being invalid?
3. When I create a new GDT and load it, do I need to reload the registers (by jumping etc) if the offsets are still the same? (e.g 0x08 for code and 0x10 for data)
Thanks.
However, since my GDT is stored in the first megabyte (generated by my bootloader) after enabling paging that address refers to a page (directory) that is not present.
So I'm now creating a new GDT in the entrypoint of my kernel.
Here are a few questions that I have:
1. Why does having an invalid GDT pointer only triple fault whenever an IRQ happens and not when executing random code, even with jmps in it?
(if I don't ever do sti it seems to work fine on all virtual machines i've tested on: VMWare, bochs, qemu)
2. When is GDT actually accessed by the CPU and how far can you go with it being invalid?
3. When I create a new GDT and load it, do I need to reload the registers (by jumping etc) if the offsets are still the same? (e.g 0x08 for code and 0x10 for data)
Thanks.