EHCI initialization issue to get control from legacy BIOS
Posted: Thu Apr 18, 2019 2:05 am
Hi.
I am trying to initialize the EHCI controller after finding it on PCI.
The bus mastering bit is set, bar 0 had been obtained, memory mapped space (and not IO ports) is set, and extended capabilities value is getting as following:
since the value of eecp in my OS is 0x68 (i.e. >= 0x40), it means the EHCI controller is under BIOS control and I need to get the control from BIOS and give it to the OS as following:
The problem is that the infinite loop never breaks, meaning that the leg_sup never changed after PCI_Write.
I also chcked leg_sup right after PCI_Write call and after every PCI_Read in the while loop, but it shows no change at all.
I am wondering what might be the source of the issue. Just to be clear, the both PCI_Read and PCI_Write calls, manipulates two 32 bits data and command ports
and the id value have been constructed based on the bus, slot, and function values after pci enumerations. Besides all these pci methods work flawlessly with other hardwares attached.
Thanks.
I am trying to initialize the EHCI controller after finding it on PCI.
The bus mastering bit is set, bar 0 had been obtained, memory mapped space (and not IO ports) is set, and extended capabilities value is getting as following:
Code: Select all
unsigned int eecp = (hccparams >> 8) & 0xFF;
Code: Select all
#define LEGSUP 0x00
#define LEGSUP_HC_BIOS 0x00010000
#define LEGSUP_HC_OS 0x01000000
if (eecp >= 0x40) {
// Disable BIOS legacy support
unsigned int leg_sup = PCI_Read(id, eecp + LEGSUP);
if (leg_sup & LEGSUP_HC_BIOS) {
PCI_Write(id, eecp + LEGSUP, leg_sup | LEGSUP_HC_OS);
while(1) {
leg_sup = PCI_Read(id, eecp + LEGSUP);
if (~leg_sup & LEGSUP_HC_BIOS && leg_sup & LEGSUP_HC_OS)
break;
}
}
}
I also chcked leg_sup right after PCI_Write call and after every PCI_Read in the while loop, but it shows no change at all.
I am wondering what might be the source of the issue. Just to be clear, the both PCI_Read and PCI_Write calls, manipulates two 32 bits data and command ports
and the id value have been constructed based on the bus, slot, and function values after pci enumerations. Besides all these pci methods work flawlessly with other hardwares attached.
Thanks.