Why is the offset of IDT entry seperated in two pieces?
Posted: Wed May 30, 2018 7:57 am
Hi,
Now I'm doing IDT again, through it does not really matter anyway, why is the low 16-bit part of address offset put on the start of the gate entry and the high part on the end? It would make sense if it was used in real mode so it was just added later to support 32-bit addressing, but this is a newer feature.
Now I'm doing IDT again, through it does not really matter anyway, why is the low 16-bit part of address offset put on the start of the gate entry and the high part on the end? It would make sense if it was used in real mode so it was just added later to support 32-bit addressing, but this is a newer feature.