Hah! I'm writing my own UEFI. Why? Because I don't want my OS to depent on such a thing as uboot.
More seriously, I thought it would be helping in learning how to do an OS. And it is! Now I am writing Memory Boot Services, it's a lot easier than that of OS's (mostly, if to not count very dumb requirements. UEFI did for Memory Services).
But. I don't know how it's possible on x86 boards, because yeah, DDR (DDRC and DDR PHY) init is kind of not exactly documented. I even don't know how it is with Intel and AMD.
Ironically, initializing SDRAM is one of the few things I've done with my first target Mips Creator CI20 board. But the manual only had DDRC registers description and nothing else. No explanation how it works, no DDR PHY at all. I actually just rewrote in mips assembly the code from uboot, making some differences where I understood and wished. uboot, in turn, got it from Ingenic's BSP code, that they gratefully had opened.
For the next targets, having Allwinner's SoCs, I've got SDRAM init code "secretely".
Thanks to one good person. But the manuals here don't have DDR related things at all. This is how it is.
So, I decided to write it on only a few of boards (6 maximum, 1 mips32r2, 3 arm32v7, 2 arm64v8).
3 of them come from the same SoC vendor, and it's hopefully will be helping with getting the needed info (they even follow me on twitter! xD), 1 is well documented, 1 is moderately well documented and 1 is android set top box where the SoC vendor is good at emailing but I am waiting on their "help" with NDA signing for like 3 months.
Of course noone wants to mess around with an enthusiast with his/her napoleonic plans.)))
But as I am getting experience, I am more and more into jumping in OS developing.
Actually I was thinking on this - I have code in C, implementing Boot Services, so it is "already" done for x86 too, what if I tried to replace this BIOS thing. But then I thought - probably Intel doesn't release even a tiny bit of information on their chipsets. even compared to these ARM SoC vendors, that at least try to release something loosely looking as a documentation. I hate to admit it, but these vendors mostly are forced to do so due to GPL. Just because there is nothing except linux and uboot on these boards, they use them and they have to open something. Not everything of course. SDRAM init code might be separated even from uboot.
If you have all the documentation for hardware, then writing UEFI is like writing DOS. Easier than multithreading preemptive SMP OS. Good luck!
How to replace BIOS with UEFI? Reflash SPI NOR flash with it and you are done!
It again boils down to the availability of the documenation from HW vendor.
In my case "feeding" my FW to the CPU ROM code is the matter of jumper/button/SD card manipulations. For example on CI20, there is a jumper. If pins 1-2 are shorted it boots from NAND flash where uboot resides. If pins 2-3 are shorted, ROM code happily boots from an SD card, where I put my SEC phase into sector 1. Thanks God, FAT partition is at 2MB farther so the entire UEFI could fit in this gap. For these boards, it's specified - the boot sequence, boot selection etc. On CI20, FW can sense boot selection pins and know where it has been loaded from, so that it can proceed there. I take advantage of this, because I don't need to initialize SD controller again, I just start to read it. How it is for PC? First, there probably is no such a rich set of boot selection possibilities, so you need to replace BIOS from the start. Apparently you need to get an info on how to flash NOR and know what the CPU expects there. And of course - know what to do next. Your SEC or PEI phase will init and test SDRAM from there, then load there DXE and transfer control at it, and that is the full UEFI environment, supporting everything what is needed for BDS, and this is not something NSFW, it is the Boot Device Selection phase, Boot Manager, dealing with what OS loader (or utility) to boot.