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I have a small 64-bit kernel with working interrupts and some basic paging, but I can't wrap my head around a few things to do with process implementation and virtual memory.

Each process should have it's own address space, which, I think, means that each process should have it's own PML4T. But how does it switch between these address spaces?
* On an interrupt the OS has to do a context switch into the interrupt handler, but where does it switch address spaces here (process to kernel space)?
* And the same issue arises when it leaves the interrupt handler, somewhere it has to switch from the kernel address space to the process address space. (before the iretq, but then it would not be able to fetch the remaining instructions)
Or am I missing something important here?

Secondly, when implementing paging, it appeared to me that the page tables also had to be mapped into virtual memory, because it would throw page faults if i didn't map them.
If this is normal, where should the pages be mapped so they do not interfere with the process?

I searched the forums and the wiki for some clues but I can't seem to find any, and I hope I'm not misunderstanding something big here.

Switching address spaces is simply a matter of loading the control register with the address of the new page table. Normally, every process will also contain the mapping for the kernel address space. As part of the context switch your routine will load the control register with the new value.

The page tables have to be mapped to manipulate them.

gijswl wrote:Or am I missing something important here?

In the usual design, the kernel is always mapped somewhere in the top half of the address space, so there's no need for a context switch on every interrupt.

gijswl wrote:Secondly, when implementing paging, it appeared to me that the page tables also had to be mapped into virtual memory, because it would throw page faults if i didn't map them.

You don't need to map the page tables, but you can't modify them if they're not mapped anywhere.

gijswl wrote:If this is normal, where should the pages be mapped so they do not interfere with the process?

The page tables should be mapped in the top half of the virtual address space, alongside the kernel.

(Seems I wasn't quite fast enough, but I'll post this anyway.)

Thanks for the quick replies, I think I understand now.