LPC and Super I/O details
Posted: Mon Nov 21, 2016 8:21 am
Hey all,
Was curious if anyone had investigated the LPC and Super I/O chip details for various chipsets?
I found some data-sheets for SMSC as well as an interesting video:
https://www.youtube.com/watch?v=F0jQWq39hkU
I'm using intel chipsets (HM77, series 9 wildcat point etc..) and based on those spec docs I've not been able to find any reference to which super i/o chip is in use or what registers it might expose for reading/writing fan control, duty cycle etc.
In theory I thought I might be able to look through the AML/ACPI from my BIOS to see if it shed some light, but it wasn't very helpful.
From the docs it would appear IO ports 2e/2f and 4e/4f are still in play but without sub-function/devices and registers I'm not too sure what to be writing where.
I'm working on the assumption that I want to be able to control fans for a fixed chipset, IE: HM77 (odds are most other intel chipsets will use the same or similar configuration and register setups).
Was curious if anyone had investigated the LPC and Super I/O chip details for various chipsets?
I found some data-sheets for SMSC as well as an interesting video:
https://www.youtube.com/watch?v=F0jQWq39hkU
I'm using intel chipsets (HM77, series 9 wildcat point etc..) and based on those spec docs I've not been able to find any reference to which super i/o chip is in use or what registers it might expose for reading/writing fan control, duty cycle etc.
In theory I thought I might be able to look through the AML/ACPI from my BIOS to see if it shed some light, but it wasn't very helpful.
From the docs it would appear IO ports 2e/2f and 4e/4f are still in play but without sub-function/devices and registers I'm not too sure what to be writing where.
I'm working on the assumption that I want to be able to control fans for a fixed chipset, IE: HM77 (odds are most other intel chipsets will use the same or similar configuration and register setups).