Enabling Interrupts Causes ISR 12

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abc123ogg
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Joined: Tue Jun 07, 2016 4:14 pm

Enabling Interrupts Causes ISR 12

Post by abc123ogg »

I think the title is self-explanatory. After executing sti, I receive ISR 12.

http://wiki.osdev.org/I_Can%27t_Get_Interrupts_Working says that I need to check if I remapped the PIC. However, it seems to be fine:

Code: Select all

#include <asm.h>

#define PIC_1_CTRL	0x20
#define PIC_2_CTRL	0xA0

#define PIC_1_DATA	0x21
#define PIC_2_DATA	0xA1

void pic_initialize()
{
	// IWC 1 - Enable initialization
	outb (PIC_1_CTRL, 0x11);
	outb (PIC_2_CTRL, 0x11);
 
	// ICW 2 - Map IRQ interrupt numbers
	outb (PIC_1_DATA, 0x20);	// IRQs 0-7 mapped to interrupts 32-39
	outb (PIC_2_DATA, 0x28);	// IRQs 8-15 mapped to interrupts 40-47
 
	// ICW 3 - Cascade PICs on IR line 2
	outb (PIC_1_DATA, 0x4);
	outb (PIC_2_DATA, 0x2);
 
	// ICW 4 - Turn on x86 mode
	outb (PIC_1_DATA, 1);
	outb (PIC_2_DATA, 1);
 
	// Null out data registers
	outb (PIC_1_DATA, 0);
	outb (PIC_2_DATA, 0);
	
	// mask everything to show that this isn't an incorrectly mapped IRQ
	outb (PIC_1_DATA, 0xFF);
	outb (PIC_2_DATA, 0xFF);
}
What other information could I attach to help someone help me fix this issue?
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BenLunt
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Re: Enabling Interrupts Causes ISR 12

Post by BenLunt »

IRQ 12, if that is the one you are receiving, is the IRQ for a PS2 style mouse, and it has sent (atleast) one byte to the PS2's output buffer.

However, it looks like to me that you are getting an exception of 12, not an IRQ of 12. Exception 12 (decimal) is the GPF, or General Protect Fault exception.
This means that you have "stepped outside of your bounds".

Does this help?

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Boris
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Re: Enabling Interrupts Causes ISR 12

Post by Boris »

Yes. Tell us if your arch ( x86_64?) , show us your GDT and TSS
int12 is stack fault exception. The spirits are telling me to check everything that can be related to stack.
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BrightLight
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Re: Enabling Interrupts Causes ISR 12

Post by BrightLight »

x86/x86_64? Kernel-mode/usermode? Do software interrupts work? Does exception handling work?
Run in Bochs, and show us the log messages.
You know your OS is advanced when you stop using the Intel programming guide as a reference.
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iansjack
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Re: Enabling Interrupts Causes ISR 12

Post by iansjack »

Some information about your interrupt/exception handlers would help. You presumably have created handling routines and made IDT entries for each of them. Have you inspected these in a debugger to show that they contain the values you think they should?
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Combuster
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Re: Enabling Interrupts Causes ISR 12

Post by Combuster »

If it's actually interrupt 12 (and not IRQ12 which corresponds to interrupt 0x74 or 0x2C), then you should have a good look at your bochs log, because it usually tells you exactly what is wrong in these cases.
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