Writing an OS targeting ARMv8

[phase]

I'd like to write an OS targeting the ARMv8 (64-bit), but I haven't found any sort of Bare Bones like there is for the ARMv6. QEMU contains a qemu-system-aarch64 which should be able to run one, but compiling the Raspberry Pi Tutorial for aarch64 didn't seem to work (QEMU exits w/o anything, which from past experience usually signifies something went wrong).

Here are the commands I used for compiling the boot.S and kernel.c files from the tutorial.

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arm-none-eabi-gcc -march=armv8-a -fpic -ffreestanding -c boot.S
arm-none-eabi-gcc -march=armv8-a -fpic -ffreestanding -std=gnu99 -O2 -Wall -Wextra -c kernel.c
arm-none-eabi-gcc -T link.ld -o os.elf -ffreestanding -O2 -nostdlib boot.o kernel.o
arm-none-eabi-objcopy os.elf -O binary os.bin

This gave me a bin which I called qemu with:

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qemu-system-aarch64 -kernel os.bin

And bam, nothing happened! I know that the GPIO offset is probably wrong (as it changed from ARMv6 to ARMv7), but I couldn't find the address for ARMv8 anywhere.

[iansjack]

The location of the GPIO(s) will be determined by which development board you are emulating. Details are available in the ARM documentation. E.g.: http://infocenter.arm.com/help/index.js ... EGAAB.html

[Owen]

arm-none-eabi-gcc compiles AArch32 code (-march=armv8 means "using the ARMv8 extensions to AArch32")


For a start, you want an aarch64-none-elf gcc. You will additionally want to rewrite any assembly for the different (A64, not old A32/ARM or T32/Thumb) instruction set.

You will also need the documentation for whatever system QEMU is emulating (and also the -kernel option normally takes an ELF, not flat binary)

[phase]

arm-none-eabi-gcc compiles AArch32 code (-march=armv8 means "using the ARMv8 extensions to AArch32")


For a start, you want an aarch64-none-elf gcc. You will additionally want to rewrite any assembly for the different (A64, not old A32/ARM or T32/Thumb) instruction set.

You will also need the documentation for whatever system QEMU is emulating (and also the -kernel option normally takes an ELF, not flat binary)

I got the aarch64-none-elf toolchain and am now having difficulties with the Assembly.

Using the RPI tutorial boot code, I ran it through the assembler hoping to get something out of it and got this message on a lot of different lines:

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kernel/boot.S:16: Error: operand 1 should be an integer register -- `ldr r4,=__bss_start'

So I looked through the ARMv8 Instruction Set Manual and found that the registers needed a w or a x in front of them, adding that changed nothing:

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kernel/boot.S:16: Error: operand 1 should be an integer register -- `ldr wr4,=__bss_start'

[iansjack]

You might want to read this white paper: http://malideveloper.arm.com/downloads/ ... 64-bit.pdf

Note that the registers are x1, etc., or w1, etc., depending upon whether you use them as 64- or 32-bit registers.

[phase]

You might want to read this white paper: http://malideveloper.arm.com/downloads/ ... 64-bit.pdf

Note that the registers are x1, etc., or w1, etc., depending upon whether you use them as 64- or 32-bit registers.

I've fixed the boot code and here's what I have so far:

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.section ".text.boot"

.globl _start

_start:
    // Setup the stack.
    mov sp, #0x8000
 
    // Clear out bss.
    ldr x4, 0
    ldr x9, =__bss_end
    mov x5, #0
    mov x6, #0
    mov x7, #0
    mov x8, #0
    b       2f
 
1:
    // store multiple at r4.
    stp x5, x8, [x4], #8
2:
    cmp x4, x9
    blo 1b
 
    // Call kmain
    bl kmain
 
    // halt
halt:
    wfe
    b halt

And I have a blank C function called kmain that has a while(1) loop in it. I get no compiler or linker errors, but QEMU doesn't come up with anything and stops as soon as I start it.

[iansjack]

You appear to be overwriting a range of memory starting at location 0. Why do you do this, and what do you expect to happen? Which development board are you targeting?

[phase]

You appear to be overwriting a range of memory starting at location 0. Why do you do this, and what do you expect to happen? Which development board are you targeting?

I was just copying the RPi tutorial. I want to target both RPi 2 Model B and Snapdragon 410 processor, the latter if doing both isn't an option. How would I be able to build for both?

[Schol-R-LEA]

I realize that it's quite late to be commenting on this, but I felt that this needed clarification:

The location of the GPIO(s) will be determined by which development board you are emulating. Details are available in the ARM documentation. E.g.: http://infocenter.arm.com/help/index.js ... EGAAB.html

To be more specific, the GPIO lines have nothing to do with the CPUs themselves; 'General-Purpose I/O' pins are hardware data lines that are part of the peripheral chips' pinouts, not the CPU pinout. Thus, the model of the CPU is relevant only insofar as different SBCs (e.g., different models of RPi) use different CPU models, and often cannot change out the CPU. It is the design of the hardware that the CPU is attached to that counts regarding the location of the GPIO offsets, not the CPU model per se.