AMD has a notion of ganged or unganged dual channel memory where ganged effectively doubles the bus size by interleaving the upper bits of (bus size x 2) on the second channel, and unganged allows concurrent access.
I have 2 questions.
1. Does this mean unganged mode is like NUMA in a way that physical memory belonging to a different module (and hence accessed via a different channel) could be accessed concurrently, while if it belongs to the same module as another access that's already in queue it would need to wait?
2. Even though there is probably no standardized way of checking, can a performance increase manifest itself by having for example CPU 0 perform memory access in one bank, while CPU 1 performs work in another?