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Hi,

I have a question regarding the stack upon IRQ.

What I understand is that if I am in user mode and an IRQ occurs the first thing that happens is that the processor will switch to the stack pointer address stored in my TSS(RSP0), which in this case should be set to the kernel stack pointer by me prior to switching to user mode. So I guess that the change in DPL forces this symptom to occur.

My question is , If I am not in user mode (kernel mode) is there a way that I can force the processor to do the same thing and switch to stack pointer address stored in the TSS


Thanks
Karim.

On IA32 / 32-bit: No.

In AMD64/x86_64: You can't prevent it.

On AMD64 you have an optional IST, or you can assume the same stack behaviour as 32-bit modes:

If IST field in interrupt gate is not 0, reads IST pointer into RSP.

The use of the IST is not re-entrant however, so if you get the same kind of interrupt or exception twice in a row you're overwriting the same stack and it's impossible to return. Therefore you'll probably want to limit its use to very specific cases.

Combuster wrote:The use of the IST is not re-entrant however, so if you get the same kind of interrupt or exception twice in a row you're overwriting the same stack and it's impossible to return. Therefore you'll probably want to limit its use to very specific cases.

Or you disable interrupts while processing your interrupt. Doesn't help with exceptions, but you should definitely not cause exceptions while processing exceptions either.