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Update 64-bit TSS Stacks?

Posted: Tue Jan 20, 2015 6:21 pm
by eryjus
I have come across a situation in my debugging that has me a little confused and I need to reach out for help, once again.

I am receiving a GP Fault followed by a GP Fault followed by a Page Fault. Each error will call my functions to dump the registers and the stack contents. I'm trying to unwind this from the last fault since there is something in my dump function that is causing a problem that will likely not be able to be duplicated once I fix the first issue; I really don't want to leave an obscure error out there if I can dig it out now.

My IDT is setup to use the following stacks from the TSS:

Code: Select all

; 00  #DE  Fault        RSP0  Kernel  -- Divide Error Exception
; 01  #DB  Trap/Fault   IST1  Kernel  -- Debug Exception
; 02  MNI  N/A          IST7  Kernel  -- Non Maskable Interrupt
; 03  #BP  Trap         IST1  Kernel  -- Breakpoint Exception
; 04  #OF  Trap         RSP0  Kernel  -- Overflow Exception
; 05  #BR  Fault        RSP0  Kernel  -- BOUND Range Exceeded Exception
; 06  #UD  Fault        IST6  Kernel  -- Invalid Opcode Exception
; 07  #NM  Fault        IST6  Kernel  -- Device Not Available Exception
; 08  #DF  Abort        IST7  Kernel  -- Double Fault Exception
; 09  N/A  N/A          N/A   None    -- Old Coprocessor Segment Overrun -- no longer used
; 0A  #TS  Fault        IST6  Kernel  -- Invalid TSS Exception
; 0B  #NP  Fault        IST6  Kernel  -- Segment Not Present
; 0C  #SS  Fault        IST6  Kernel  -- Stack Fault Exception
; 0D  #GP  Fault        IST6  Kernel  -- General Protection Exception
; 0E  #PF  Fault        IST5  Kernel  -- Page Fault Exception
; 0F  N/A  N/A          N/A   None    -- Unused
; 10  #MF  Fault        IST6  Kernel  -- x87 Floating Point Error
; 11  #AC  Fault        IST6  Kernel  -- Alignment Check Exception
; 12  #MC  Abort        IST7  Kernel  -- Machine Check Exception
; 13  #XM  Fault        IST6  Kernel  -- SIMD Floating Point Exception

The GPF and PF are set to use separate ISTs. However, the first and second GPF are set to use the same stack, starting at the same address -- I do nothing to maintain this address and I'm pretty sure the CPU does nothing of the sort either. So, in effect, I am overwriting the stack from the first GPF with the second GPF and I'm thinking this is a big deal.

So, some questions:
  • Is it typical to use the stacks in the TSS like I have?
  • Should I be replacing the stack pointer on the TSS once I an in an interrupt?
  • If I'm off my rocker, what should I really be doing?
My IDT initialization code is here.

As always, thanks in advance for your responses.

Re: Update 64-bit TSS Stacks?

Posted: Wed Jan 21, 2015 1:27 am
by Combuster
The solution to this problem is not to use ISTs at all, so the exceptions nicely follow under each other on one stack. (Except for perhaps the double-fault, but that's for a different reason.)