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Pretending that you know even more is much worse.Combuster wrote:Thinking that you know while you don't know is a disease.
Well, I can hint about processor modes. Next we can see what's wrong with basic assembly in Intel's manual (or is it somebody's overconfidence?).Combuster wrote:Go read the manual since this is wrong and very, very basic assembly.
In that case, you should go to the store and get it replaced or your money back. Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.embryo wrote:Pretending that you know even more is much worse.Combuster wrote:Thinking that you know while you don't know is a disease.Well, I can hint about processor modes. Next we can see what's wrong with basic assembly in Intel's manual (or is it somebody's overconfidence?).Combuster wrote:Go read the manual since this is wrong and very, very basic assembly.
Have you read the manual carefully enough? But it seems even my post was skipped.Gigasoft wrote:Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.
Instead of trolling and throwing a tantrum over being corrected, you can cite the relevant portion of the manual - if it exists.embryo wrote:Have you read the manual carefully enough? But it seems even my post was skipped.Gigasoft wrote:Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.
Well, if Combuster gives up on finding relevant information I am glad to present itCombuster wrote:Instead of trolling and throwing a tantrum over being corrected, you can cite the relevant portion of the manual - if it exists.
The important part here is about Base and Index registers.Intel® 64 and IA-32 Architectures Software Developer’s Manual wrote:3.7.5.1 Specifying an Offset in 64-Bit Mode
The offset part of a memory address in 64-bit mode can be specified directly as a static value or through an address
computation made up of one or more of the following components:
• Displacement — An 8-bit, 16-bit, or 32-bit value.
• Base — The value in a 32-bit (or 64-bit if REX.W is set) general-purpose register.
• Index — The value in a 32-bit (or 64-bit if REX.W is set) general-purpose register.
• Scale factor —A value of 2, 4, or 8 that is multiplied by the index value.
The address size override prefix, 0x67, still works in 64-bit mode, allowing 16-bit bases and indexes.embryo wrote:The important part here is about Base and Index registers.
Yet another hack, mentioned somewhere deep enough to be missed by most part of developers. Should we trust a yet another hack? Or is it better just to read it in simple words and use 32 or 64 bit registers?Icee wrote:cf. table 1-3 in section 1.2.3 and table A-33 in appendix A in AMD Manual volume 3.