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Hi All,

I wanted to experiment with DVFS on Intel SandyBridge and through the Intel Manual 3B, I see that the DVFS is achieved on SandyBridge using Enhanced Intel SpeedStep.

It says that IA32_PERF_CTL could be set to achieve DVFS. However the Manual does not explain how to set the lower 16 bits in IA32_PERF_CTL to achieve this. I went across searching on different forums to ascertain how to set this to no avail. However, what I could learn is that the 16 bits are divided into two 8-bit blocks that specify the Multiplier and VID.

I also found that the multiplier can be found on intel sandy bridge as

[CPU frequency] = BCLK x [CPU multiplier].
I am using a Xeon E5-2680 with 2.7GHz. The data sheet(https://www-ssl.intel.com/content/dam/w ... asheet.pdf) says the BCLK0 and BCLK1 are 100MHz(Table:6-11).

So the current multiplier seems to be 27.

The VID range is 0.60V-1.35V.

1. Now if I have to scale the frequency, do the go about changing 8-MSB(15-8) to any value lesser than 27 only?

2. Or do I need to change the 8-LSB(7-0) between 0.6 and 1.35V.

I am aware that SandyBridge has a limited set of P-states from P0 to PN and I just can't go about setting the 16-bits as per my will.

So, What I basically wanna know is how do I do DVFS on SandyBridge?

PS: Please correct me if my understanding so far is incorrect.



Thanks in advance.

Best,

Sridutt

First, clarify. Do you want to change voltage or frequency?
I've no idea about voltage. Frequency is the easy part.

Evaluate ACPI _PSS method on the CPU object and you get a nice list of values to put into that register's 16 bits.

EDIT: your alternative is to run acpidump on linux on the same hardware, locate _PSS for the CPU and get the values from there and hardcode it in your program for experimentation. Obviously this won't be portable between models even in the same product line.

mateuszb wrote:mateuszb

Thanks for the reply. Yes, I want to change the frequency and not voltage.

Could you please share more details about the 2 methods that you have suggested or pointers where I can get more info about them?

I haven't worked with ACPI _PSS method on the CPU object nor run acpidump on linux.

Best,
Sridutt

Download ACPICA from https://acpica.org/downloads and compile on Linux. Then run acpidump utility and then you can run the acpi decompiler on your machine's SSDT table and extract _PSS from the source code. This should be enough to get you started.

For more details there's a complete ACPI specification at http://acpi.info/spec.htm

While I don't know about this particular machine, my experience with Intel processors is that they don't have the required ACPI-objects, and thus that you need to reverse-engineer the logic yourself.

In order to obtain an optimal operating point for a particular load, you must change both VID and frequency. Newer processors will typically know which values that don't work together, and will disallow setting them. This can be used to obtain the optimal point.

You would want to read this thread about Intel Atom that I posted a while ago: http://forum.osdev.org/viewtopic.php?f=15&t=26703

Actually, these methods are up to the BIOS vendor to put in the ACPI tables. Usually CPU vendors gives the AML to the BIOS company and it's up to the BIOS vendor to include it or not. Sometimes it's also safeguarded by ACPI conditional statements. So you get _PSS based on enabling ACPI mode, or not, but it's rare.

Newer ACPI also replaces _PSS with _CPC which is even easier to use.

As for Intel, at least on some Xeons, the 16 bit field is a frequency in Mhz units in 100Mhz increments.

EDIT: If you lack _PSS, _CPC, update your bios.

mateuszb wrote:Actually, these methods are up to the BIOS vendor to put in the ACPI tables. Usually CPU vendors gives the AML to the BIOS company and it's up to the BIOS vendor to include it or not. Sometimes it's also safeguarded by ACPI conditional statements. So you get _PSS based on enabling ACPI mode, or not, but it's rare.

Newer ACPI also replaces _PSS with _CPC which is even easier to use.

As for Intel, at least on some Xeons, the 16 bit field is a frequency in Mhz units in 100Mhz increments.

EDIT: If you lack _PSS, _CPC, update your bios.

It seems like on my Sony Vaio with an i3-processor, there is an _PSS object, and the higher 8 bits seems to correspond to the frequency, while the lower 8 bits is always 0. I suppose I can make power-management run on it if I use Intel's performance MSRs (haven't tried, but it should work).

Yeah, it will work.

mateuszb wrote:Actually, these methods are up to the BIOS vendor to put in the ACPI tables. Usually CPU vendors gives the AML to the BIOS company and it's up to the BIOS vendor to include it or not. Sometimes it's also safeguarded by ACPI conditional statements. So you get _PSS based on enabling ACPI mode, or not, but it's rare.

Newer ACPI also replaces _PSS with _CPC which is even easier to use.

As for Intel, at least on some Xeons, the 16 bit field is a frequency in Mhz units in 100Mhz increments.

EDIT: If you lack _PSS, _CPC, update your bios.

Do you mean to say that I could just set the 16bit field to any frequency in Mhz I want? (Ofcourse, below the max).

Thanks,
Sridutt

rdos wrote:

mateuszb wrote:Actually, these methods are up to the BIOS vendor to put in the ACPI tables. Usually CPU vendors gives the AML to the BIOS company and it's up to the BIOS vendor to include it or not. Sometimes it's also safeguarded by ACPI conditional statements. So you get _PSS based on enabling ACPI mode, or not, but it's rare.

Newer ACPI also replaces _PSS with _CPC which is even easier to use.

As for Intel, at least on some Xeons, the 16 bit field is a frequency in Mhz units in 100Mhz increments.

EDIT: If you lack _PSS, _CPC, update your bios.

It seems like on my Sony Vaio with an i3-processor, there is an _PSS object, and the higher 8 bits seems to correspond to the frequency, while the lower 8 bits is always 0. I suppose I can make power-management run on it if I use Intel's performance MSRs (haven't tried, but it should work).

Did you try using the MSR?

Thanks,
Sridutt

sridutt wrote: Do you mean to say that I could just set the 16bit field to any frequency in Mhz I want? (Ofcourse, below the max).

No, I didn't say that. All I said is that some Xeon models encode lower 16 bits that way. Unfortunately this encoding is often model and family specific.

sridutt wrote:

rdos wrote:

mateuszb wrote:Actually, these methods are up to the BIOS vendor to put in the ACPI tables. Usually CPU vendors gives the AML to the BIOS company and it's up to the BIOS vendor to include it or not. Sometimes it's also safeguarded by ACPI conditional statements. So you get _PSS based on enabling ACPI mode, or not, but it's rare.

Newer ACPI also replaces _PSS with _CPC which is even easier to use.

As for Intel, at least on some Xeons, the 16 bit field is a frequency in Mhz units in 100Mhz increments.

EDIT: If you lack _PSS, _CPC, update your bios.

It seems like on my Sony Vaio with an i3-processor, there is an _PSS object, and the higher 8 bits seems to correspond to the frequency, while the lower 8 bits is always 0. I suppose I can make power-management run on it if I use Intel's performance MSRs (haven't tried, but it should work).

Did you try using the MSR?

Yes, it seems to work. Haven't tried to measure power consumption in order to verify it, but at least it appears to give the right operating points.