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#include "pgxapic.h"
//use only c construction !
//C Run time isn't fully initialised
//in this global array i define the vector for each IRQ (don't forget VECTOR_OFFSET!)
//i follow the standard priority
BYTE g_IRQ_to_vector[24] = {0xB8, 0xB0, 0xA8, 0x60, 0x58, 0x50, 0x48, 0x40, 0xA0, 0x98, 0x90, 0x88, 0x80, 0x78, 0x70, 0x68, 0x38, 0x30, 0x28, 0x20, 0x18, 0x10, 0x8, 0x0};
void x86InitAPIC( void )
{
NKOutputDebugString (TEXT("+x86InitAPIC\r\n"));
OALMSG(TRUE , (L"------------------MyLog--------------------------\r\n"));
/////////////////////////////////////////////////////////////////
//Step1-6 : config IOAPIC
//Step1 : get config information from mptabels
//This won't work when there are more apic tabels !
IOApicEntry IoapicTable;
InterruptEntry InterruptTable[25];
memset( (char*)InterruptTable, '\0', sizeof(InterruptEntry)*25);
store_mptabels ( &IoapicTable, InterruptTable );
//Step2 : get IRQ for INTA -> intD
BYTE PciMap[4];
GetPciIRQ( PciMap );
//Step3 : Apic Enable
EnableApic();
//Step4 memory mapping the APIC
DWORD dwsize = 0x40;
DWORD* apic = (DWORD* )PhysicalAddressToVirtual(APIC_ADRESS, &dwsize);
//substep, write apicID
OALMSG(TRUE , (L"0x%X\r\n",ApicRead(apic,0) ));
ApicWrite(apic, 0, ApicRead(apic,0) );
OALMSG(TRUE , (L"0x%X\r\n",ApicRead(apic,0) ));
//Step5 Configure the redirection entries
ConfigRedirection(InterruptTable, PciMap, apic );
//Step6 Map the remaining redirection entries that weren't specified by the MPtabel specs
for(int i=0; i<24*2; i+=2)
{
if( ApicRead(apic, APIC_REDIRECTION_REG+i) == 0x00010000 )
{
if(i <= 30 )
{
SetApic_std( apic, i, VECTOR_OFFSET + g_IRQ_to_vector[i/2] );
}
else
{
SetApic_pci( apic, i, VECTOR_OFFSET +g_IRQ_to_vector[i/2] );
}
}
}
DWORD lpdwValHigh = 0;
DWORD lpdwValLow = 0;
NKrdmsr( 0x1B, &lpdwValHigh, &lpdwValLow );
lpdwValLow |= MYPOW(11);
NKwrmsr( 0x1B, lpdwValHigh, lpdwValLow );
OALMSG(TRUE , (L"0x%08X_%08X\r\n",lpdwValHigh, lpdwValLow));
dwsize = LAPIC_SIZE;
char* Lapic = (char* )PhysicalAddressToVirtual(0xFEE00000, &dwsize);
OALMSG(TRUE , (L" Task Pri Reg : 0x%08X\r\n", *((DWORD*)(Lapic+0x80)) ));
*((DWORD*)(Lapic+0x80)) &= ~0xF0;
OALMSG(TRUE , (L" Task Pri Reg : 0x%08X\r\n", *((DWORD*)(Lapic+0x80)) ));
OALMSG(TRUE , (L" Local Apic ID Reg : 0x%08X\r\n", *((DWORD*)(Lapic+0x20)) ));
OALMSG(TRUE , (L" Local Apic Ver Reg : 0x%08X\r\n", *((DWORD*)(Lapic+0x30)) ));
OALMSG(TRUE , (L" Logical destination Reg : 0x%08X\r\n", *((DWORD*)(Lapic+0xD0)) ));
OALMSG(TRUE , (L" Spurious Interrupt Vector Reg : 0x%08X\r\n", *((DWORD*)(Lapic+0xF0)) ));
*((DWORD*)(Lapic+0xF0)) |= MYPOW(8);
OALMSG(TRUE , (L" Spurious Interrupt Vector Reg : 0x%08X\r\n", *((DWORD*)(Lapic+0xF0)) ));
OALMSG(TRUE , (L" LVT CMCI reg : 0x%08X\r\n", *((DWORD*)(Lapic+0x2F0)) ));
for (i = VECTOR_OFFSET; i < VECTOR_OFFSET + 8*24; i+=8)
{
OALMSG(TRUE , (L"Hookvector 0x%04x\r\n",i ));
HookInterrupt(i, (FARPROC)pgxISR);
}
OALMSG(TRUE , (L"------------------MyLog--------------------------\r\n"));
OALMSG(TRUE, (L"-x86InitAPIC\r\n"));
}
DWORD PhysicalAddressToVirtual(DWORD dwPhyAddr, DWORD* pdwSize)
{
DWORD dwOffset;
DWORD dwSize;
DWORD dwAlt=dwPhyAddr;
if (pdwSize == NULL)
{
return NULL;
}
// This offset is because NKCreateStaticMapping will shift 8 bits for making
// address is page aligned before allocate static memory, so we need to know
// how many bytes will be offset, and then add it back before return.
dwOffset = dwPhyAddr & 0xFF;
OALMSG(OAL_MEMORY , (TEXT("AcpiStaticMapping(): Offset in Page is 0x%X!!!\r\n"),dwOffset));
dwSize = *pdwSize + dwOffset;
OALMSG(OAL_MEMORY , (TEXT("AcpiStaticMapping(): Size will be allocate is 0x%X!!!\r\n"), dwSize));
*pdwSize = dwSize;
if( (dwAlt & 0xfff) != 0 )
{
//page size in windows ce 7 = 4096 bytes
//this means that adresses like 0x****_*X** will fail some checks and NKCreate Static mapping will fail !
//So pagealigning with 12 bits !
dwOffset = dwPhyAddr & 0xFFF;
dwSize = *pdwSize + dwOffset;
dwAlt = dwAlt & 0xFFFFF000;
OALMSG(FALSE , (L"Not page-alligned ! Adjusting with extra offset\r\n"));
return reinterpret_cast<DWORD>(NKCreateStaticMapping(dwAlt >> 8, dwSize)) + dwOffset;
}
return reinterpret_cast<DWORD>(NKCreateStaticMapping(dwPhyAddr >> 8, dwSize)) + dwOffset;
}
BOOL CheckSum (const BYTE* pbData, DWORD cbLength)
{
BYTE bSum = 0;
for (DWORD i = 0; i < cbLength; ++i)
{
bSum += *pbData++;
}
return bSum == 0; //clever did not know that!
}
DWORD ApicRead(DWORD* apic, BYTE index)
{
//tell the apic we want BYTE index
*apic = index;
//return the data from IOWIN
return *((DWORD*)(((BYTE* )apic)+APIC_DATA));
}
void ApicWrite(DWORD* apic, BYTE index, DWORD value )
{
//tell the apic we want BYTE index
*apic = index;
//write the datain IOWIN
*((DWORD*)(((BYTE* )apic)+APIC_DATA)) = value;
}
void SetApic_std( DWORD* apic, BYTE index, BYTE vector)
{
//assume default settings
DWORD high_redirection=0x0;
DWORD low_redirection=0x00010000;
//low_redirection = ApicRead(apic, APIC_REDIRECTION_REG+index );
high_redirection = ApicRead(apic, APIC_REDIRECTION_REG+1+index);
OALMSG(TRUE , (L"%d 0x%08X_%08X ----> ",index/2,high_redirection,low_redirection));
high_redirection &= ~MYPOW(31);
high_redirection &= ~MYPOW(30);
high_redirection &= ~MYPOW(29);
high_redirection &= ~MYPOW(28);
low_redirection &= ~MYPOW(16); //unmasked
low_redirection &= ~MYPOW(15); //Edge triggerd
low_redirection &= ~MYPOW(13); //Active high
low_redirection &= ~MYPOW(11); //set physical ID
low_redirection |= vector ; //vector
ApicWrite( apic, APIC_REDIRECTION_REG+index+1, high_redirection);
ApicWrite( apic, APIC_REDIRECTION_REG+index, low_redirection);
low_redirection = ApicRead(apic, APIC_REDIRECTION_REG+index );
high_redirection = ApicRead(apic, APIC_REDIRECTION_REG+1+index);
OALMSG(TRUE , (L"0x%08X_%08X\r\n",high_redirection,low_redirection));
};
void SetApic_pci( DWORD* apic, BYTE index, BYTE vector)
{
//assume default settings
DWORD high_redirection=0x0;
DWORD low_redirection=0x00010000;
//low_redirection = ApicRead(apic, APIC_REDIRECTION_REG+index );
high_redirection = ApicRead(apic, APIC_REDIRECTION_REG+1+index);
OALMSG(TRUE , (L"%d 0x%08X_%08X ----> ",index/2, high_redirection,low_redirection));
high_redirection &= ~MYPOW(31);
high_redirection &= ~MYPOW(30);
high_redirection &= ~MYPOW(29);
high_redirection &= ~MYPOW(28);
low_redirection &= ~MYPOW(16); //unmasked
low_redirection |= MYPOW(15); //Level triggerd
low_redirection |= MYPOW(13); //Active Low
low_redirection &= ~MYPOW(11); //set physical ID
low_redirection |= vector ; //vector
ApicWrite( apic, APIC_REDIRECTION_REG+index+1, high_redirection);
ApicWrite( apic, APIC_REDIRECTION_REG+index, low_redirection);
low_redirection = ApicRead(apic, APIC_REDIRECTION_REG+index );
high_redirection = ApicRead(apic, APIC_REDIRECTION_REG+1+index);
OALMSG(TRUE , (L"0x%08X_%08X\r\n",high_redirection,low_redirection));
};
void GetPciIRQ( BYTE PciMap[4])
{
//How are the PCI interrupts mapped ?
//check at offset 0x60 from the LPC register ()
//LPC Register : Bus0, Device31,Function0
//vars
PciConfig_Reg pci_reg;
char* ptr;
//clearing structure
memset(&pci_reg, '\0', sizeof(PciConfig_Reg));
//get LPC register from PCI
ULONG x = PCIReadBusData(0, 31, 0, ((void*)(&pci_reg)), 0, LPC_SIZE);
ptr = (char*)(&pci_reg);
PciMap[0] = *(ptr+0x60);
PciMap[1] = *(ptr+0x61);
PciMap[2] = *(ptr+0x62);
PciMap[3] = *(ptr+0x63);
}
void ConfigRedirection(InterruptEntry InterruptTable[25], BYTE PciMap[4], DWORD* apic)
{
int index=0;
int vector =0;
while(1)
{
//break case
if(InterruptTable[index].IntType == 0 && InterruptTable[index].IntFlag == 0 && InterruptTable[index].SourceBusIRQ == 0 && InterruptTable[index].SourceBusID == 0){break;}
//normal case
if(InterruptTable[index].IntType == 0x0 || InterruptTable[index].IntType == 0x3 )
{
if(InterruptTable[index].IntFlag == 0x00) //fill in bus specification
{
if(InterruptTable[index].SourceBusID == 0x0 || InterruptTable[index].SourceBusID == 0x1 ) //pci settings
{
vector = VECTOR_OFFSET + g_IRQ_to_vector[ PciMap[(InterruptTable[index].SourceBusIRQ) & 0x03 ]];
SetApic_pci( apic, InterruptTable[index].DestApicPin*2, vector);
}
else if( InterruptTable[index].SourceBusID == 0x2) //isa settings
{
vector = VECTOR_OFFSET + g_IRQ_to_vector[InterruptTable[index].DestApicPin];
SetApic_std( apic, InterruptTable[index].DestApicPin*2, vector);
}
}
else if( InterruptTable[index].IntFlag == 0x0F) //fill pci settings
{
vector = VECTOR_OFFSET + g_IRQ_to_vector[ PciMap[(InterruptTable[index].SourceBusIRQ) & 0x03 ]];
SetApic_pci( apic, InterruptTable[index].DestApicPin*2, vector);
}
else if( InterruptTable[index].IntFlag == 0x05) //fill ISA settings
{
vector = VECTOR_OFFSET + g_IRQ_to_vector[InterruptTable[index].DestApicPin];
SetApic_std( apic, InterruptTable[index].DestApicPin*2, vector);
}
index++;
}
}
}
void EnableApic(void)
{
//setting bit<0> Other Interrupt COntrol Register
//first start enabling the IOAPIC
//this is done by setting the Other Interrupt COntrol Register bit0
//OIC address = RCBA + 0x31FF
//rcba address : OFFFSET from LPC Register
//LPC Register : Bus0, Device31,Function0
//vars
PciConfig_Reg pci_reg;
DWORD dwsize = RCBA_SIZE;
char* rcba = NULL;
char* oic = NULL;
//clearing structure
memset(&pci_reg, '\0', sizeof(PciConfig_Reg));
//get LPC register from PCI
ULONG x = PCIReadBusData(0, 31, 0, ((void*)(&pci_reg)), 0, LPC_SIZE);
//get rcba adress & memmory map this register.
rcba = (char* )PhysicalAddressToVirtual(pci_reg.rcba, &dwsize);
oic = rcba + OIC_OFFSET;
OALMSG(TRUE, (L"OIC value : 0x%X\r\n",*oic));
//enable IOAPIC & apic adress decode
*oic |= 0x01;
OALMSG(TRUE, (L"The internal IOxAPIC is enabeld (+address decode) 0x%X\r\n",*oic));
}
void print_mptabels (void )
{
//parsing the complete mptabels --> get "ioapic->ApicAddr"
//search in bios information for string _MP_
const char szSig[] = "_MP_";
DWORD pdwSize = 0x0FFFFF - 0x0E0000; //from specs
const char* psVirtStart = reinterpret_cast<const char *>(PhysicalAddressToVirtual(0x0E0000, &pdwSize));
mpfloatstruct *ptr1 = NULL;
// interate though the memory range looking for the _MP_ sig on 16byte boundries
for (DWORD dwOffset = 0; dwOffset < pdwSize ; dwOffset += 16)
{
if (0 == strncmp(psVirtStart + dwOffset, szSig, _countof(szSig) - 1))
{
OALMSG(TRUE , (L" Found the MP floating structure.\r\n"));
ptr1 = (mpfloatstruct*)(psVirtStart + dwOffset);
break;
}
}
if(ptr1 != NULL)
{
OALMSG(TRUE , (L" ptr->signature : %S\r\n", ptr1->signature ));
OALMSG(TRUE , (L" ptr->physaddr : 0x%X\r\n",ptr1->physaddr ));
OALMSG(TRUE , (L" ptr->length : 0x%X\r\n", ptr1->length ));
OALMSG(TRUE , (L" ptr->spec_rev : 0x%X\r\n", ptr1->spec_rev ));
OALMSG(TRUE , (L" ptr->checksum : 0x%X\r\n", ptr1->checksum ));
OALMSG(TRUE , (L" feature1 : 0x%X\r\n", ptr1->feature1 ));
OALMSG(TRUE , (L" feature2 : 0x%X\r\n", ptr1->feature2 ));
OALMSG(TRUE , (L" feature3 : 0x%X\r\n", ptr1->feature3 ));
OALMSG(TRUE , (L" feature4 : 0x%X\r\n", ptr1->feature4 ));
OALMSG(TRUE , (L" feature5 : 0x%X\r\n", ptr1->feature5 ));
}
if( CheckSum((BYTE*)ptr1, ptr1->length*16) != TRUE )
{
OALMSG(TRUE , (L"CheckSum Failed !\r\n\r\n"));
}
else
{
OALMSG(TRUE , (L"CheckSum OK !\r\n\r\n"));
};
mpConfigHeader* ptr2 = NULL;
pdwSize = sizeof(mpConfigHeader);
ptr2 = (mpConfigHeader*)(PhysicalAddressToVirtual(ptr1->physaddr, &pdwSize ));
//now update with real length
pdwSize = ptr2->Length;
ptr2 = (mpConfigHeader*)(PhysicalAddressToVirtual(ptr1->physaddr, &pdwSize ));
OALMSG(TRUE , (L" Found the MP Configuration Table Header.\r\n"));
OALMSG(TRUE , (L" ptr->Signature : %S\r\n", ptr2->Signature ));
OALMSG(TRUE , (L" ptr->Length : 0x%X\r\n", ptr2->Length ));
OALMSG(TRUE , (L" ptr->Revision : 0x%X\r\n", ptr2->Revision ));
OALMSG(TRUE , (L" ptr->CheckSum : 0x%X\r\n", ptr2->CheckSum ));
OALMSG(TRUE , (L" ptr->OemId : %S\r\n", ptr2->OemID ));
OALMSG(TRUE , (L" ptr->ProductID : %S\r\n", ptr2->ProductID ));
OALMSG(TRUE , (L" ptr->OemTableptr : 0x%X\r\n", ptr2->OemTablePointer ));
OALMSG(TRUE , (L" ptr->OemTableSize : 0x%X\r\n", ptr2->OemTableSize ));
OALMSG(TRUE , (L" ptr->EntryCount : 0x%X\r\n", ptr2->EntryCount ));
OALMSG(TRUE , (L" ptr->localAPicAddr : 0x%X\r\n", ptr2->LocalApicAddr ));
OALMSG(TRUE , (L" ptr->ExTableLength : 0x%X\r\n", ptr2->ExTableLength ));
OALMSG(TRUE , (L" ptr->ExTableCheckSum : 0x%X\r\n", ptr2->ExTableCheckSum ));
if( CheckSum((BYTE*)ptr2, ptr2->Length) != TRUE )
{
OALMSG(TRUE , (L"CheckSum Failed !\r\n\r\n"));
}
else
{
OALMSG(TRUE , (L"CheckSum OK !\r\n\r\n"));
};
//cast ptr2 as char pointer and add mpconfigheader offset to it
BYTE* ptr3 = (BYTE*)(((char*)(ptr2)) + sizeof(mpConfigHeader));
DWORD address=0;
OALMSG(TRUE , (L"Parsing the entry field !\r\n"));
OALMSG(TRUE , (L"-----------------------------------\r\n"));
for(int i =0; i< ptr2->EntryCount; i++)
{
if(*ptr3 == 0x00)
{
OALMSG(TRUE , (L"Found processor desciption\r\n"));
ProcessorEntry* processor = (ProcessorEntry*)ptr3;
OALMSG(TRUE , (L" Entry type : 0x%X\r\n",processor->EntryType));
OALMSG(TRUE , (L" LocalApicID : 0x%X\r\n",processor->LocalApicID));
OALMSG(TRUE , (L" LocalApicVersion : 0x%X\r\n",processor->LocalApicVersion));
OALMSG(TRUE , (L" CPU Flags : 0x%X\r\n",processor->CPUFlags));
OALMSG(TRUE , (L" StepModel : 0x%X\r\n",processor->StepModel));
OALMSG(TRUE , (L" Family : 0x%X\r\n",processor->Family));
OALMSG(TRUE , (L" FeatureFlags : 0x%X\r\n",processor->FeatureFlags));
ptr3 += 20;
}
else if( *ptr3 == 0x01 )
{
OALMSG(TRUE , (L"Found bus desciption\r\n"));
BusEntry* bus = (BusEntry*)ptr3;
OALMSG(TRUE , (L" Entry type : 0x%X\r\n",bus->EntryType));
OALMSG(TRUE , (L" Bus ID : 0x%X\r\n",bus->BusID));
OALMSG(TRUE , (L" Bus String : %S\r\n",bus->BusString));
ptr3 += 8;
}
else if( *ptr3 == 0x02 )
{
OALMSG(TRUE , (L"Found IOAPIC desciption\r\n"));
IOApicEntry* ioapic = (IOApicEntry*)ptr3;
OALMSG(TRUE , (L" Entry type : 0x%X\r\n",ioapic->EntryType));
OALMSG(TRUE , (L" Apic ID : 0x%X\r\n",ioapic->ApicID));
OALMSG(TRUE , (L" Version : 0x%X\r\n",ioapic->Version));
OALMSG(TRUE , (L" Apic Flags : 0x%X\r\n",ioapic->ApicFlags));
OALMSG(TRUE , (L" Apic Adrr : 0x%X\r\n\r\n",ioapic->ApicAddr));
address = ioapic->ApicAddr;
ptr3 += 8;
}
else if( *ptr3 == 0x03 )
{
OALMSG(TRUE , (L"Found IO Interrupt assignment desciption\r\n"));
InterruptEntry* IntEntry = (InterruptEntry*)ptr3;
OALMSG(TRUE , (L" Entry type : 0x%X\r\n",IntEntry->EntryType));
OALMSG(TRUE , (L" Interrupt type : 0x%X\r\n",IntEntry->IntType));
OALMSG(TRUE , (L" Interrupt Flag : 0x%X\r\n",IntEntry->IntFlag));
OALMSG(TRUE , (L" Source Bus ID : 0x%X\r\n",IntEntry->SourceBusID));
OALMSG(TRUE , (L" Source Bus IRQ : 0x%X\r\n",IntEntry->SourceBusIRQ));
OALMSG(TRUE , (L" Destination ApicID : 0x%X\r\n",IntEntry->DestApicID));
OALMSG(TRUE , (L" Destination ApicPin : 0x%X\r\n\r\n",IntEntry->DestApicPin));
ptr3 += 8;
}
else if( *ptr3 == 0x04 )
{
OALMSG(TRUE , (L"Found Local Interrupt assignment desciption\r\n"));
LocalInterrupt* localint = (LocalInterrupt*)ptr3;
OALMSG(TRUE , (L" Entry type : 0x%X\r\n",localint->EntryType));
OALMSG(TRUE , (L" Interrupt type : 0x%X\r\n",localint->InterruptType));
OALMSG(TRUE , (L" PO_EL : 0x%X\r\n",localint->PO_EL));
OALMSG(TRUE , (L" SourceBusID : 0x%X\r\n",localint->SourceBusID));
OALMSG(TRUE , (L" SourceBusIRQ : 0x%X\r\n",localint->SourceBusIRQ));
OALMSG(TRUE , (L" DestLocalApicID : 0x%X\r\n",localint->DestLocalApicID));
OALMSG(TRUE , (L" SourceBusID : 0x%X\r\n",localint->LintIN));
ptr3 += 8;
}
}
}
void store_mptabels ( IOApicEntry* IoapicTable, InterruptEntry InterruptTable[25] )
{
//parsing the complete mptabels --> get "ioapic->ApicAddr"
//search in bios information for string _MP_
const char szSig[] = "_MP_";
DWORD pdwSize = 0x0FFFFF - 0x0E0000; //from specs
const char* psVirtStart = reinterpret_cast<const char *>(PhysicalAddressToVirtual(0x0E0000, &pdwSize));
mpfloatstruct *ptr1 = NULL;
// interate though the memory range looking for the _MP_ sig on 16byte boundries
for (DWORD dwOffset = 0; dwOffset < pdwSize ; dwOffset += 16)
{
if (0 == strncmp(psVirtStart + dwOffset, szSig, _countof(szSig) - 1))
{
ptr1 = (mpfloatstruct*)(psVirtStart + dwOffset);
break;
}
}
if( CheckSum((BYTE*)ptr1, ptr1->length*16) != TRUE )
{
OALMSG(TRUE , (L"CheckSum Failed !\r\n\r\n"));
}
mpConfigHeader* ptr2 = NULL;
pdwSize = sizeof(mpConfigHeader);
ptr2 = (mpConfigHeader*)(PhysicalAddressToVirtual(ptr1->physaddr, &pdwSize ));
//now update with real length
pdwSize = ptr2->Length;
ptr2 = (mpConfigHeader*)(PhysicalAddressToVirtual(ptr1->physaddr, &pdwSize ));
if( CheckSum((BYTE*)ptr2, ptr2->Length) != TRUE )
{
OALMSG(TRUE , (L"CheckSum Failed !\r\n\r\n"));
}
//cast ptr2 as char pointer and add mpconfigheader offset to it
BYTE* ptr3 = (BYTE*)(((char*)(ptr2)) + sizeof(mpConfigHeader));
DWORD address=0;
int INT_index=0;
for(int i =0; i< ptr2->EntryCount; i++)
{
if(*ptr3 == 0x00)
{
ProcessorEntry* processor = (ProcessorEntry*)ptr3;
ptr3 += 20;
}
else if( *ptr3 == 0x01 )
{
BusEntry* bus = (BusEntry*)ptr3;
ptr3 += 8;
}
else if( *ptr3 == 0x02 )
{
IOApicEntry* ioapic = (IOApicEntry*)ptr3;
IoapicTable->EntryType = ioapic->EntryType;
IoapicTable->ApicID = ioapic->ApicID;
IoapicTable->Version = ioapic->Version;
IoapicTable->ApicFlags = ioapic->ApicFlags;
IoapicTable->ApicAddr = ioapic->ApicAddr;
ptr3 += 8;
}
else if( *ptr3 == 0x03 )
{
InterruptEntry* IntEntry = (InterruptEntry*)ptr3;
InterruptTable[INT_index].EntryType = IntEntry->EntryType;
InterruptTable[INT_index].IntType = IntEntry->IntType;
InterruptTable[INT_index].IntFlag = IntEntry->IntFlag;
InterruptTable[INT_index].SourceBusID = IntEntry->SourceBusID;
InterruptTable[INT_index].SourceBusIRQ = IntEntry->SourceBusIRQ;
InterruptTable[INT_index].DestApicID = IntEntry->DestApicID;
InterruptTable[INT_index].DestApicPin = IntEntry->DestApicPin;
INT_index++;
ptr3 += 8;
}
else if( *ptr3 == 0x04 )
{
LocalInterrupt* localint = (LocalInterrupt*)ptr3;
ptr3 += 8;
}
}
}
void print_debug(void)
{
OALMSG(TRUE, (L"----------------------------------------------\r\n"));
for (int i = 0; i < SYSINTR_MAXIMUM; i++)
{
OALMSG(TRUE, (L" SYSINTR(%d) to IRQ(%d)\r\n",i,g_oalSysIntr2Irq[i]));
}
OALMSG(TRUE, (L"----------------------------------------------\r\n"));
for (int i = 0; i < OAL_INTR_IRQ_MAXIMUM; i++)
{
OALMSG(TRUE, (L" IRQ(%d) to SYSINTR(%d)\r\n",i,g_oalIrq2SysIntr[i]));
}
OALMSG(TRUE, (L"----------------------------------------------\r\n"));
}
static ULONG pgxISR()
{
OALMSG(TRUE , (L"------------------ ISR --------------------------\r\n"));
return 0;
}
