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Translation Lookaside Buffer

Posted: Fri Sep 14, 2012 7:05 am
by skandalOS
Hello,

I've got a simple question to you about TLB.

As I know the TLB is part of MMU which contains/stores the most recently used pages.

Something similar like this:

due to Andrews S. Tannenbaum (Modern Operating Systems)

Virtual Page........... some flags............pageframe(physical page)
140.....................................................31
860.....................................................55
....

So, before the MMU begins to translate it throws a look to the TLB if there is an entry for the searched virtual page.
If the virtual page exists it takes the pageframe and use it.
For example for 860 (which could be a stack-page) it takes the page 55.

But what happens if there a two times the own virtual page entry, from two different processes?
For example two same stack-pages, which would be very easy possible?

The MMU could take wrong page instead of the other. and then boooom.
There is no detailed explanation about this topic.

Are there for every process different TLB-Entries, how does it work exactly?

Please help me, I'm learning for the OS-Exam and they ask deep questions.

I'm a little bit confused and want to know the detailed structure about TLB.

Thanks a lot

Re: Translation Lookaside Buffer

Posted: Fri Sep 14, 2012 7:10 am
by bluemoon
skandalOS wrote:But what happens if there a two times the own virtual page entry, from two different processes?
The OS is responsible to invalidate the entry upon switching process, there are specific mechanism to do so for each system.
(In some case you can do lazy invalidate as well)

Re: Translation Lookaside Buffer

Posted: Mon Sep 17, 2012 10:25 am
by skandalOS
Hi,

I've got a little question.

What happens with the contain of TLB of the process if the scheduler takes another Process to run.

I think the whole TLB-values will be cleared or not?

Re: Translation Lookaside Buffer

Posted: Mon Sep 17, 2012 10:29 am
by Combuster
RTFM; 2. AMD, chapter 5 verse 5. Will have an equivalent chapter in Intel 3A as well.