OSDev.org

I went through the specifications of debug registers in intel manuals...It says we can stop the program execution by setting either instruction break point or data breakpoint.. I tried both but breakpoints are not being hit..
I have mentioned the following specification relevant to this..

Say i am setting 4 instruction breakpoints..
DR0 = 0xfffe58a0
DR1 = 0xfffe6860
DR2 = 0xfffe67c0
DR3 = 0xfffe0c68

Debug registers DR4 and DR5 are reserved. So i am not using them.
DR6 is status register, i am not setting it.

After going through the specs, i am setting DR7 = 0x000007FF(I have enables all instruction breakpoints).

But during program execution i am not able to hit the these instruction breakpoints. Its true with data breakpoints also.

Please guide and any help would be appreciated

Have you tried it on real hardware? The VMs generally lack support for it altogether and Bochs need a compile-time switch to support it.

Yes, i have tried it on real hardware..

This may sound like a dumb question but are you sure that your code is actually executing at the given addresses?

BTW The first two addresses have nine xdigits instead of eight.

Yes, i am sure that the code is executing at the addresses specified..

Sorry for mentioning wrong DR0 and DR1.. Didn't notice while posting.
It should be
DR0 = 0xfffe58a0
DR1 = 0xfffe6860

Are those addresses that you are putting in the debug registers physical addresses?

These are linear addresses...
Since i am not using paging, linear address is same as physical address...

A really silly question, no doubt, but you don't mention your exception handler. Are you sure this is set up correctly?

Yes everything is set up properly...
I have manually set breakpoint at DB handler also...its not hitting

The only other potential problem that I can think of is that the registers aren't pointing to the first byte of the instruction (including any prefix).

are you sure that your code is actually executing at the given addresses

i am sure that the code is executing at the addresses specified

i am not using paging

0xfffe58a0

That's definitely not your code. It's BIOS space. What are you trying to do there?

Thanks for the replies...I am still not able to find solution, this is my code only which i have for micro controller operation..

Did you try inserting a debug breakpoint instruction (int3) in your code, to test if your debug handler gets called?
It's a different exception vector (#BP 3 instead of #DB 1), but it's easier to setup and very similar

Vinay wrote:Thanks for the replies...I am still not able to find solution, this is my code only which i have for micro controller operation..

If you're not using paging, then like Combuster said that address is in the BIOS region. Are you certain that it points to the *first byte* of a valid instruction? And that the CPU isn't operating in real mode by that point?

I am sure that CPU is operating in protected mode, and now my query is how to check it points to the first byte of the instruction?