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theoritical paging qs

Posted: Mon Apr 16, 2012 4:30 pm
by clavin123
well we have a page directory of 1024 entries and each page table of 1024 entries again
now in most computer i guess each process is given its own page table
so can i say that at max 1024 process can run.
also lets say a process needs more than 4mb. now one page table can address 4mb so the process would need 2 page tables.
so in this case how will the translation of logical to physical address work.
now in case the process is less than 4mb, aaccording to me this how things work-
normally all address calls in process are relative to begining of the process. so every logical address is translated to physical
as each logical adress gives us two things (page no and offset into page)
but at times i have read that at compile time the begginig of the process might now be assumed 0 but any arbitrary value

what i mean by beggining is the start address you see when you execute the 'objdump -f a.out' command
so now lets say the beggining is 5 mb. so now how will the logical address be translated??

Re: theoritical paging qs

Posted: Mon Apr 16, 2012 4:39 pm
by linguofreak
clavin123 wrote:well we have a page directory of 1024 entries and each page table of 1024 entries again
now in most computer i guess each process is given its own page table
so can i say that at max 1024 process can run.
Wrong. Each process is generally given its own page directory and set of page tables.

I don't think you quite understand how the x86 paging system works.

Re: theoritical paging qs

Posted: Mon Apr 16, 2012 4:56 pm
by JAAman
1) no, in most systems processes are not given page tables, but rather an entire virtual address space -- meaning each program has 4GB (under 32bit PMode) and you can have an unlimited number of processes, not limited to 1024, or any other number

2) most OSs will typically place all programs at a fixed location (so that all programs are actually located at the same place in virtual memory)

4) (on x86) the addresses that programs see (logical addresses), are first translated using segmentation, which translates the address by adding the segment base address to it, and performing any protection checks due to segmentation mechanism -- note that most OSs don't use segmentation, and simply set all segment bases to 0, and limits to 4GB, effectively eliminating it from the translation process (although segmentation is still used to control access rights) -- adding the segment base to the address produces a linear address

next, the linear address is entered into the paging system, to produce the actual physical address (if paging is disabled, then the linear address is the same as the physical address)

the OS will usually give a different set of page tables to each process, and then when switching between processes, it also switches page tables, allowing each program its own full address space, with a full 4GB for each program, although the OS will usually reserve part of that 4GB for itself to use (which is typically shared between all address spaces)



i recommend reading the intel manuals, especially 3A:3 -- read it a couple times if you have trouble with it, and then ask if you still don't understand something (and make sure you quote, or at least tell which section# you are having trouble with to help us help you understand better)

Re: theoritical paging qs

Posted: Tue Apr 17, 2012 2:38 am
by clavin123
ok as suggested i read a lil bit of the intel manuals
but i got some doubts again
first of all a basic doubt is how are logical address assigned
everywhere it says its the address the program sees at execution
so can i assume that when a program is compiled the start address that the compiler assigns is the
logical address??
and its the same as what i see when i do

Code: Select all

objdump -f ./a.out
now lets say the start address is 128mb (as well as logical address)
now according to intel manuals
the first 10 bits of logical address refer to a paging structure. i am assuming that the first 10 bits give the page directory
the next 10 bits give the page table and the last 12 bits are offset.
so in the above case for 128 mb
a page directory is assigned to the process
now lets say theres another process that has a start address of 128 mb
in this case it wants the same page directory. so how will it be assigned the page directory??
will the older process get swapped out??
if i am wrong can you provide an answer for the above situation.

ps. btw i am not saying that a process with start address will be given physical address 128mb. i am just saying that since the first 10 bits in both the process would be same so they get same page directory.

intel manual volume 3 section 4.3

Re: theoritical paging qs

Posted: Tue Apr 17, 2012 7:16 am
by Velko
No. For your example (128 MiB) both processes will want Page Directory's Entry #32. But each process should have it's own, separate Page Directory.

Read up on CR3 register. Typically you allocate and fill a PD for each process. And when switching between processes, you reload CR3 register with (physical) address to PD of that process.

Re: theoritical paging qs

Posted: Tue Apr 17, 2012 7:31 am
by gravaera
Yo:

The manuals use three terms to refer to addresses:

"Virtual" addresses are addresses that have yet to pass through the segmentation unit.
"Linear" Addresses are addresses that have yet to pass through the PMMU.
"Effective/Physical" addresses are directly usable addresses that can be sent out over the FSB link to retrieve information from RAM.

It'll be useful if you re-read the chapters with that in mind so you'll understand them better.

--Peace out
gravaera.