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int pioreadide(uint16 port, uint8 typ, uint32 lba,uint16 count,uint8 *buffer) {
	int i;
    //typ is for selectinh which channel ... Master(0) / Slave(1)    
	typ &=0x01;
    typ <<= 4 

	inb(port+1); //read error register port
	while (inb(port+7)&0x80)==0x80) ; // wait for BUSY BUS bit to clear
	while (inb(port+7)&0x40)!=0x40) ; // wait for DRIVE READY bit to be set
	
	switch (port) {
		case (0x1F0): outb(0x3f6,0x0a); break;//set nIEN - no interrupts 'cause we do PIO
		case (0x170): outb(0x376,0x0a); break;
		default :
			#ifdef DeviceControlRegister
			outb(DeviceControlRegister,0x0a);
			#endif
			break;
	};

	//set registers
	outb(port+2,count);
	outb(port+3,lba & 0xff);
	outb(port+4,(lba>>8) & 0xff);
	outb(port+5,(lba>>16) & 0xff);
	outb(port+6,((((lba>>24) & 0xff)|0x70)&0xEF)|typ); 

	inb(port+1); //read error port
	while ((inb(port+7)&0x80)==0x80) ; //wait until BUSY BIT is cleared

	outb(port+7, 0x21); //commands like : 0x20 read with retry / 0x21 read without retry
	
	while (count>0) {
		while ((inb(port+7)&0x08)!=0x08) ; //wait until DRQ bit is set : Data ReQuest bit set -> indicates that the drive is ready to transfer data

		while (i<256) {
			*((uint16 *)&buffer[i<<1])=inw(port);
			i++;
		};
		inb(port+1);
		while ((inb(port+7)&0x80)==0x80) ; //wait until BUS BUSY bit to be cleared
		count--;
	}

	switch (port) {
		case (0x1F0): outb(0x3f6,0x08); break;//clear nIEN =set interrupts
		case (0x170): outb(0x376,0x08); break;
		default :
			#ifdef DeviceControlRegister
			outb(DeviceControlRegister,0x08);
			#endif
			break;
	};
	return(count);
}

Status register (port+7) (aka the old 0x1f7/0x177)
(when read)
+=======-=======-=======-=======-=======-=======-=======-=======+
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|-------+-------+-------+-------+-------+-------+-------+-------|
| BSY | DRDY | DWF | DSC | DRQ | CORR | IDX | ERR |
+===============================================================+
NOTE 7 - Prior to the definition of this standard, DRDY and DSC were unlatched
real time signals.
- BSY (Busy) is set whenever the drive has access to the Command Block
Registers. The host should not access the Command Block Register when
BSY=1. When BSY=1, a read of any Command Block Register shall return
the contents of the Status Register. This bit is set by the drive
(which may be able to respond at times when the media cannot be
accessed) under the following circumstances:
a) within 400 nsec after the negation of RESET- or after SRST has been
set in the Device Control Register. Following acceptance of a reset
it is recommended that BSY be set for no longer than 30 seconds by
Drive 1 and no longer than 31 seconds by Drive 0.
b) within 400 nsec of a host write of the Command Register with a Read,
Read Long, Read Buffer, Seek, Recalibrate, Initialize Drive
Parameters, Read Verify, Identify Drive, or Execute Drive Diagnostic
command.
c) within 5 usecs following transfer of 512 bytes of data during
execution of a Write, Format Track, or Write Buffer command, or 512
bytes of data and the appropriate number of ECC bytes during the
execution of a Write Long command.
- DRDY (Drive Ready) indicates that the drive is capable of responding to
a command. When there is an error, this bit is not changed until the
Status Register is read by the host, at which time the bit again
indicates the current readiness of the drive. This bit shall be cleared
at power on and remain cleared until the drive is ready to accept a
command.
- DWF (Drive Write Fault) indicates the current write fault status. When
an error occurs, this bit shall not be changed until the Status Register
is read by the host, at which time the bit again indicates the current
write fault status.
- DSC (Drive Seek Complete) indicates that the drive heads are settled
over a track. When an error occurs, this bit shall not be changed until
the Status Register is read by the host, at which time the bit again
indicates the current Seek Complete status.
- DRQ (Data Request) indicates that the drive is ready to transfer a word
or byte of data between the host and the drive.
- CORR (Corrected Data) indicates that a correctable data error was
encountered and the data has been corrected. This condition does not
terminate a data transfer.
- IDX (Index) is set once per disk revolution.
- ERR (Error) indicates that an error occurred during execution of the
previous command. The bits in the Error Register have additional
information regarding the cause of the error.

Information technology -
AT Attachment Interface for Disk Drives

ABSTRACT
This standard defines the AT Attachment Interface. This standard defines an
integrated bus interface between disk drives and host processors. It provides
a common point of attachment for systems manufacturers, system integrators,
and suppliers of intelligent peripherals.

evoex wrote:I expect your multi boot header has been placed wrongly (not dword aligned?).

See http://wiki.osdev.org/Grub_Error_13