why ADD triggers a GP exception?

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harvey
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Joined: Tue Nov 01, 2011 11:07 am

why ADD triggers a GP exception?

Post by harvey »

Hi, everyone

I'm writing a toy os and I came across a new exception-related problem. I've constructed a dummy IDT and exception handler. The case is when a instruction "add $4, %esp " is executed, a GP exception is triggered and the dummy exception handler is invoked and the system halts. As you know, the vector is 13.
An interesting thing is before the instruction triggers the exception, it is executed properly once earlier. That is, the second time execution cases exception.
the memory contents of the instruction is like the below

<native_restore_fl + 10>: 0xc304c483 0xdae8c3fa 0xc3ffffff

=>0xc01032dc <native_restore_fl+10>: add $4, %esp
0xc01032df <native_restore_fl+13>: ret

Could anyone give me a hint?
I'm writing a toy os and my current goal is to resemble, simplify and understand the linux kernel. In the early stage, it's designed to be a UP/UMA preemptive kernel and will be extended to support SMP/NUMA etc in the future.
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Combuster
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Re: why ADD triggers a GP exception?

Post by Combuster »

It's not the instruction that causes that interrupt. Check your error codes and PIC configuration.
"Certainly avoid yourself. He is a newbie and might not realize it. You'll hate his code deeply a few years down the road." - Sortie
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harvey
Posts: 23
Joined: Tue Nov 01, 2011 11:07 am

Re: why ADD triggers a GP exception?

Post by harvey »

Combuster wrote:It's not the instruction that causes that interrupt. Check your error codes and PIC configuration.
you're right. It's none business of interrupts. I feel shame I spent four days solving this stupid problem...
I'm writing a toy os and my current goal is to resemble, simplify and understand the linux kernel. In the early stage, it's designed to be a UP/UMA preemptive kernel and will be extended to support SMP/NUMA etc in the future.
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