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Access SPD
Posted: Sat Sep 03, 2011 5:07 am
by mohdumar
Is there standard way of getting the raw SPD memory info data to parse? any ASM instruction?
The problem is not with parsing SPD info, there is no info on how to get the data in the specification.
Like how do apps e.g. CPUZ and SPECCY get this data ?
Re: Access SPD
Posted: Sat Sep 03, 2011 6:43 am
by djmauretto
Is there standard way of getting the raw SPD memory info data to parse? any ASM instruction?
The problem is not with parsing SPD info, there is no info on how to get the data in the specification.
System Management Bus
Note that is not standard, Intel chipset use some register, Nvidia chipsert other..
Example:
Intel ICH SMbus register:
Base_Address + 0 Host Status
Base_Address + 2 Host Control
Base_Address + 3 Host Command
Base_Address + 4 Transmit Slave Address
And so on.....
nVidia SMbus register:
Base_Address + 0 Host Control
Base_Address + 1 Host Status
Base_Address + 2 Transmit Slave Address
Base_Address + 3 Host Command
And so on...
Note that first generation of chipset use I/O
Now it's memory mapped... ( Maybe also I/O)
Anyway if you have Intel Chipset is all well documented,
Other chipset no
Re: Access SPD
Posted: Sat Sep 03, 2011 9:59 am
by Brynet-Inc
djmauretto wrote:Anyway if you have Intel Chipset is all well documented,
Other chipset no
AMD documents this in their southbridge datasheets, I implemented support for the SB8xx in OpenBSD, indeed both port mapped I/O and MMIO is supported.. however getting the SMBus base address is easier for port mapped, as it's at an offset to the fixed PM base address. There is a PCI device for SMBus, but it has no BARs, getting a MMIO base address requires fiddling with port mapped I/O anyway.
The register layout is compatible with the Intel PIIX, a common trend OpenBSD didn't anticipate.. so the driver covering quite a few SMBus controllers is called piixpm, heh.
http://devio.us/~brynet/june-2nd.png
Re: Access SPD
Posted: Sat Sep 03, 2011 12:00 pm
by djmauretto
Yes I forgot AMD chipset...
In the first chipset generation (Intel,Via) SMbus was within Power Management Controller PCI Device
There is also System Management Bus BIOS Interface INT 15h , but
from my test I never found any BIOS supports the SMBus....
from the point of view of programming you have to write some code to handle all this..
Through SMbus you can also control the clock synthesizer (clock of CPU,PCI,SATA,PCIEX, and so on)
and various temperature sensors, always if you have the datasheet of your device
Re: Access SPD
Posted: Sat Sep 03, 2011 1:49 pm
by Brynet-Inc
djmauretto wrote:Through SMbus you can also control the clock synthesizer (clock of CPU,PCI,SATA,PCIEX, and so on)
and various temperature sensors, always if you have the datasheet of your device
Yeah, lots of temperature sensors.. apparently some newer memory modules have a temp sensor along with the usual SPD EEPROM, sadly there is a fairly wide assortment of chips that aren't compatible, OpenBSD has a driver that works for a bunch of them.
Re: Access SPD
Posted: Wed Sep 07, 2011 7:43 am
by mohdumar
There is some success
I am able to identify my smbus in pci devices (class code 0x0c05)
Its an ICH7 ( vendor Intel 0x8086 -> device id 0x27da)
Now I have to get base address...!
I have found some sources of a bootloader - the spd part is
http://forge.voodooprojects.org/p/chame ... spd.c#L252
Doesnt it parse info according to some general method ?
Re: Access SPD
Posted: Thu Sep 08, 2011 12:03 am
by djmauretto
Now I have to get base address...!
ICH7 has the base address of SMBus at Offset 20h,( Bus 0 Device 31 Function 3 Offset 20h)
is better than you write a general code, otherwise will work only on your PC,
so you must scan from offset 10h to 24h for Base Address.