x86_64 - disabling paging?

[q3k]

Hello,

I've been porting my microkernel to x86_64. For this, I need a function that will let me read raw memory data, by bypassing paging. Here's how I'm trying to implement it right now:

Code: Select all

asm_ReadU64Physical:
    ; disable paging
    mov rcx, cr0;
    btc rcx, 31;
    mov cr0, rcx;

    ; do our stuff
    mov rax, qword [rdi];
    
    ; enable paging
    mov rdx, cr0 
    bts rdx, 31;
    mov cr0, rdx
    
    ret;

However, it seems to triple fault (I'm using this very early in my boot chain, almost right after switching to long mode, so I don't have any IDT or interrupt handlers set up yet) upon returning from the function (if I place a jmp $ right before ret, it just sits there). What am I doing wrong? The way I'm calling this code works, as dummy functions like these work and return correctly.

Code: Select all

asm_TestFunction:
    mov rax, rdi;
    add rax, 0x23;
    ret

Any help would be very appreciated, as I am quite lost.

[zity]

You cannot disable paging once in long mode. If you disable paging in long mode, you will no longer be in long mode.

[q3k]

You cannot disable paging once in long mode. If you disable paging in long mode, you will no longer be in long mode.

*sigh*, that's what I feared, and kinda remembered from the Intel Manuals. Thanks for the clarification!

[xyzzy]

Since you have such a large virtual address space in long mode, you could just map all of physical memory into the kernel part of the address space somewhere at boot time and use that to access physical memory.

[Owen]

Since you have such a large virtual address space in long mode, you could just map all of physical memory into the kernel part of the address space somewhere at boot time and use that to access physical memory.

Virtual address space is 48-bits (with a big chasm down the middle). Physical address space is 56 bits (IIRC)

[stlw]

Since you have such a large virtual address space in long mode, you could just map all of physical memory into the kernel part of the address space somewhere at boot time and use that to access physical memory.

Virtual address space is 48-bits (with a big chasm down the middle). Physical address space is 56 bits (IIRC)

There is no hardware supporting more than 46 physical bits in the market. Usually in it 40 bit only.

[Owen]

Since you have such a large virtual address space in long mode, you could just map all of physical memory into the kernel part of the address space somewhere at boot time and use that to access physical memory.

Virtual address space is 48-bits (with a big chasm down the middle). Physical address space is 56 bits (IIRC)

There is no hardware supporting more than 46 physical bits in the market. Usually in it 40 bit only.

AMD Family 10h (Phenom, Phenom II, 10h Opterons) all have a 48-bit physical address space. This will just fit into your virtual address space, with a big divide down the middle...

Who knows what Bulldozer will bring.

[xyzzy]

That may be the maximum supported physical address space size, but it's unlikely that you'll encounter a system with that much RAM (for now, at least). What I do is set aside 256GB of the kernel address space to map physical memory to, and if something wants to access physical memory outside that a special mapping is created on the kernel heap for it.