Paging code error
Posted: Sun Aug 21, 2011 2:37 pm
Hi all,
When I enable paging, bochs resets with a triple fault error. It seems that it is every and any memory access which triggers the error. So, I'm assuming that I have an error with setting up paging, and the issue is not with my interrupt handler. Here is the code.
paging.c:
paging_asm.s (NASM code):
Thanks.
When I enable paging, bochs resets with a triple fault error. It seems that it is every and any memory access which triggers the error. So, I'm assuming that I have an error with setting up paging, and the issue is not with my interrupt handler. Here is the code.
paging.c:
Code: Select all
typedef struct page_dir_entry_s{
bool present:1;
bool writeable:1;
bool user_access:1;
bool write_through:1;
bool cache_disabled:1;
bool accessed:1;
bool unused0:1;
bool use_mb:1;//makes pages 4MB not 4KB
bool unused1:4;
u32 frame:20;
} page_dir_entry_t;
typedef struct page_table_entry_s{
bool present:1;
bool writeable:1;
bool user_access:1;
bool write_through:1;
bool cache_disabled:1;
bool accessed:1;
bool dirty:1;
bool unused0:1;
bool global:1;
bool unused1:3;
u32 phys_page_addr:20;
} page_table_entry_t;
extern u32 end;//as declared in the linker script
static u32 next_addr=0;
static page_dir_entry_t* page_dir=NULL;
static page_table_entry_t* page_table=NULL;
extern void enable_paging(u32);
void InitPaging(){
next_addr=end;
while((next_addr%4096)!=0)
++next_addr;
page_dir=(void*)next_addr;
next_addr+=4*1024;
memset(page_dir,0,4*1024);
page_table=(void*)next_addr;
next_addr+=4;
u32 addr=0;
u32 i=0;
*(((u32*)page_table)+i)=0;//zero it out
while(addr<next_addr){
page_table[i].present=true;
page_table[i].writeable=true;
page_table[i].phys_page_addr=addr;
++i;
*(((u32*)page_table)+i)=0;//zero it out
addr+=(1024*4);//4KB
next_addr+=4;
}
page_dir[0].writeable=true;
page_dir[0].present=true;
page_dir[0].frame=(u32)page_table;
enable_paging((u32)page_dir);
}Code: Select all
[global enable_paging]
enable_paging:
push ebp
mov eax,[esp+4]
mov cr3,eax
mov eax,cr0
or eax,0x80000000
mov cr0,eax
pop ebp
ret