OSDev.org

Posted: **Tue Oct 26, 2004 11:00 pm**

Hello fello OS coders!!

Someone help me!!!!!

I'm having troubles seting up interrupts in my OS. It seems every time I get an interrupt I also get a fault (I think it is a GPF but I'm not sure since my handler is pretty simple...). This is of course very annoying when trying to code a simple keyboard driver grrrrr...

Here is all the important snippets of code (all in the same file)

Code: Select all

SEGMENT INTRPT USE32

global initInterrupts
global _registerISR
global _registerException

ignoreAll:
    mov edx, 0x20
    mov al, 0x20
    out dx, al
    iret

hang:
    inc BYTE [DWORD 0xB8000] ; Don't actually hang, flicker the character on the screen!
    jmp hang;
    
%macro isrHandler 1
%if %1 < 0x20
handler_%1      dd hang
%else
handler_%1      dd ignoreAll
%endif
__isr%1:
    ; Push the state of the CPU
    pushad
    call DWORD[ handler_%1 ]
    popad
    iret
%endmacro

SEGMENT INTRPT

isrHandler 0x00
isrHandler 0x01
isrHandler 0x02
...
isrHandler 0x2F

ISRLENGTH EQU (handler_0x01 - handler_0x00)

initInterrupts:
    mov eax, idtEntries
    mov edi, eax
    mov DWORD [idtBase], eax     ; Generate idtBase value here (seems to work)
    mov eax, __isr0x00
    add eax, 0x00100000
    mov ebx, 0x00008E00
    mov ecx, 48
idtLoop:
    stosd
    xchg eax, ebx
    stosd
    xchg eax, ebx
    add eax, ISRLENGTH
    loop idtLoop
    
    
    LIDT [idtDesc]
    sti
    ret
    
_registerISR:
    mov eax, DWORD [esp+8]
    cmp eax, 0x0F
    jb noWAYISR
    xor edx, edx
    mov ecx, ISRLENGTH
    mul ecx
    add eax, handler_0x20
    mov edi, eax
    mov eax, DWORD [esp+4]
    mov DWORD [edi], eax
noWAYISR:
    ret

_registerException:
    mov eax, DWORD [esp+8]
    cmp eax, 0x20
    jb noWAYExc
    xor edx, edx
    mov ecx, ISRLENGTH
    mul ecx
    add eax, handler_0x00
    mov edi, eax
    mov eax, DWORD [esp+4]
    mov DWORD [edi], eax
noWAYExc:
    ret

alignment   dw 0x0000
idtDesc     dw 0x0180 ; 48 entries!
idtBase     dd 0x00000000    ; Generated at run time 'cause I can't figure
                             ; out how to get nasm to generate it statically.

idtEntries:
dd 0x00100000
dd 0x00008E00
...

The PIC has already been remapped to interrupts after 0x20 (done in the boot sector ala linux

). I don't understand what the problem is!

Also, when I run the code in BOCHS, it panics saying that the LDTR register is invalid, when I haven't even touched the bloody thing anywhere in my code. Is this what I'm doing wrong? Must I have an LDT? (Please no).

I would appreciate any help/support.

Thanks guys!!!

Posted: **Wed Oct 27, 2004 11:00 pm**

First of all, why do you create(as code) same type of interrupts for different interrupts? You can create two interrupt handlers and then write there address in the interrupt table.(They don't have to be different)(You don't have to use identical seperate code:) )

What is the value of you CS segment in the GDT? Is it being written to the table?

Posted: **Wed Oct 27, 2004 11:00 pm**

Hey I figured out my problem. Turns out I was executing an IRET twice in my code

As for the code to register new handlers, I rewrote the code in C for extra readability and I have now set up a suitable environment for my C kernel. Very exciting stuff

Posted: **Fri Oct 29, 2004 11:00 pm**

IRET twice is like jumping off a skycraper, you should implement a basic exception manager in order the debug the problem

OSDev.org

Interrupts in Protected mode

Interrupts in Protected mode

Re: Interrupts in Protected mode

Re: Interrupts in Protected mode

Re: Interrupts in Protected mode