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hi os-dever out there

i've noticed that the exception-handling doesn't seem to be perfect.
imagine the worst case: you got a paged system, software-mutitasking (i mean, no TSS are used, taskswitching is done with your own code). a process is in an endless slope, pushing values on the stack continuously. somewhen the stack reaches the bottom and an pagefault-exception is raised.
BUT, what then? when calling the exception-handler 12 bytes have to be pushed on the stack, but this, again, causes a pagefault. so, the cpu wants to raise a double-fault, which also fails since the stack is full. the machine resets.

how can i handle this case?

greets, hartyl

You can make(and should!) exceptions use a seperate stack.

this would be a solution - how do i do it?

greets, hartyl

Well, you need to make a call gate(you know what that is?). Well basicly a call gate is a way to call functions running in a different privilage ring. Read about it in Intel Developer Manuals. So, what you do is make a call gate in the interrupt table.
Anton.

i have heard about it, but i haven't looked up how exactly it works.
thanks, i'll give it a try and go about it.

greets, hartyl

edit: should i make a call gate for every exception or only for the page-fault ones?

another edit: am i right if i say that using TSS doesn't have any future? i have heard that hey aren't supported on AMD's x86-64 anymore.

greets, hartyl

You should make a call gate for every exception, and also for all system calls

no thats not true: x86-64 (AMD or Intel)in long mode doesnt support TSS based
              TASK-SWITCHING
but it acctually REQUIRES a TSS before entering Long mode(if i understand the docs correctly)

for which part exactly do you need it? what's its purpose?

one of the best uses for the TSS is that it provides automatic stack switching on rign change: if you change rigns (in a int handler for example)it will automatically change to a different stack--so your kernel has a different stack this will also solve the stack- and page- fault problems automatically because the processor will automatically change to the currently loaded rign0 stack  read intel vol.3 chapter 6 for more info -- and get the x86-64 manuals from AMD for more on what is and isnt supported in long mode since much of the TSS is ignored in long mode -IA32e is fully compatible so both should be the same

>one of the best uses for the TSS is that it provides automatic stack
>switching on rign change
You can do that with a call gate.

what if my so-called "worst case exception" occours in ring0-code? nothing would help. if that exception called a callgate, no stack-switch occours and i get a triple-fault.

greets, hartyl

Well, then that will mean that you have a faulty OS.(That's why windows craches)
Anton.

i believe a call gate still requires a TSS to change stacks the TSS provides the ring0 SS:ESP a call gate doesnt provide a SS so the CPU looks up the new SS:ESP in the TSS (ref: vol.3 page 4-22 paragraph 2)