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Hi all,

I am novice here. Currently, I am trying to develop a Ethernet driver for our teaching purpose OS, XINU. You can find some information here: http://en.wikipedia.org/wiki/Xinu. I met a lot of problems about developing driver for XINU. The biggest one is, I don't know how to handle the interrupt and it goes crazy!

Here is background information: The hardware I am dealing with is ICH10D/82567LM. My current progress is, when my XINU kernel startup, I can find NIC on PCI, reset the MAC and PHY, initialize it, setup RX, enable interrupt for NIC, and register the interrupt in my XINU kernel.

But here comes problem, whatever interrupt I enabled in IMS, I will contiguously be interrupted by all of them. Especially, I enable RXT0 interrupt, I will be interrupt by that very fast. I think that is because I didn't handle interrupts correctly. But the documents do not provide a lot information. And may be I still need to add some other support into XINU kernel. Currently, the tty using interrupt works fine with my XINU.

Can anyone give me some hints how to deal with that? I would really appreciate you help.

Thanks.

Cheng

Any idea?

From the looks of the SDM this chipset is very similar to the 8254x Gigabit part.

What are your settings for the Interrupt Mask Set/Read Register? Also make sure to read the Interrupt Cause Read Register to figure out what type of interrupt on the card is being generated.

ReturnInfinity wrote:From the looks of the SDM this chipset is very similar to the 8254x Gigabit part.

What are your settings for the Interrupt Mask Set/Read Register? Also make sure to read the Interrupt Cause Read Register to figure out what type of interrupt on the card is being generated.

In the purpose of simplicity, I only set RXT0 (receive timer interrupt) in Interrupt Mask Set Register. To test whether I interrupt works, I then set all Interrupt Cause Set Register as 1bit. Then I read from Interrupt Cause Read Register as 1FFFFFFF. This is very strange! I have been stuck on this for quite a while. Help me~~Please~~

ccheng wrote:Any idea?

Really? How about you wait more than an hour before you bump the thread. Oh, you waited 61 minutes. I guess that's more than an hour. Okay, wait a day or two next time, give some people a chance to actually see your first post. And either way, bumping your posts like that isn't the best netiquette, so actually I'd recommend you just don't do it at all.

quok wrote:

ccheng wrote:Any idea?

Really? How about you wait more than an hour before you bump the thread. Oh, you waited 61 minutes. I guess that's more than an hour. Okay, wait a day or two next time, give some people a chance to actually see your first post. And either way, bumping your posts like that isn't the best netiquette, so actually I'd recommend you just don't do it at all.

Thank for your recommendation, I'll not do that.

Make sure you set the Interrupt Mask Clear Register to all 1's before you set the Interrupt Mask Set/Read Register.

Writing all 1's to the Interrupt Mask Clear Register is what disables the interrupt types. Then you can specifically enable certain types via the Interrupt Mask Set Register.

What hardware are you using that has the i8256x NIC? An Atom board?

Thanks,
-Ian Seyler