How 16 bit program recognize 32 bit REG data transaction?

[osdevkid]

Dear All,

How 16 bit programs are works fine with 32 bit register (EBP ESP etc) ?
For example,

Code: Select all

	push ebp			; save EBP reg value
	mov ebp, esp		; move ESP reg value in to EBP reg

	mov esp, ebp		; restore ESP reg value from EBP reg
	pop ebp				; restore EBP reg value

How it recognize 32 bit transactions ?

Some more information about environment:
Code complied with NASM compiler

nasm main.asm -o main.com

Code started with

BITS 16
[ORG 0]

[Combuster]

How does it recognise the difference between add and jmp instructions? The difference between ECX and EDX?

[osdevkid]

How does it recognise the difference between add and jmp instructions?

add & jmp instructions are having different opcode values, machine instruction binary values are different.

My question is,

if I am running 16 bit program on 16 bit processor, then ESP, EBP are not available, instead SP and BP are available, whether it will truncate the higher order bytes or any possibility for system fault exception?

if I am running 16 bit program on 32 bit processor, where they will use whole 4 bytes of ESP, EBP or only lower order bytes ?

NASM how it accepts 32 bit registers in its program starts with

BITS 16

[JamesM]

if I am running 16 bit program on 16 bit processor, then ESP, EBP are not available, instead SP and BP are available, whether it will truncate the higher order bytes or any possibility for system fault exception?

The 8086 series were not forwards compatible.

[osdevkid]

if I am running 16 bit program on 16 bit processor, then ESP, EBP are not available, instead SP and BP are available, whether it will truncate the higher order bytes or any possibility for system fault exception?

The 8086 series were not forwards compatible.

So you mean it will truncate the higher order bytes of ESP, EBP etc. In this case, why NASM not given an error or warning when we use 32 bit instructions ?

[JamesM]

if I am running 16 bit program on 16 bit processor, then ESP, EBP are not available, instead SP and BP are available, whether it will truncate the higher order bytes or any possibility for system fault exception?

The 8086 series were not forwards compatible.

So you mean it will truncate the higher order bytes of ESP, EBP etc. In this case, why NASM not given an error or warning when we use 32 bit instructions ?

No, as in, it's not compatible. AFAIK the 8086 will bork on 32-bit instructions.

[osdevkid]

AFAIK the 8086 will bork on 32-bit instructions.

=
As Far As I Know, the 8086 will crash on 32-bit instructions
Is it right ?

[JamesM]

AFAIK the 8086 will bork on 32-bit instructions.

=
As Far As I Know, the 8086 will crash on 32-bit instructions
Is it right ?

Correct. That is, if you're running on a 16-bit machine (like you mentioned). If you're running on a 32 or 64-bit machine, just in 16-bit mode, it will work.

There is an operand-size override prefix that is put before the instruction to make it 32-bit.

[qw]

Unlike the 8086 and 80286, 32-bit effective addresses can be generated (via the address-size prefix) [...] Instructions can utilize 32-bit operands through the use of the operand size prefix.

Note that the opposite is also true: when running in 32-bit mode, 16-bit addresses and operands may be used with the same prefixes.

[robos]

Because nasm defaults to a modern processor. And modern processors have 32-bit registers available in 16-bit mode, otherwise you wouldn't be able to switch to protected mode etc.

If you want to restrict which instructions and operands you can use, tell nasm which CPU the code is restricted to / will be running on, example:

Code: Select all

CPU		8086

All of this is in the nasm manual....