OSDev.org

I think I misunderstand either GDT segments or paging. Because I don't get one thing - if I load a program at physical address 0xC0100000 I can easily map it to 0x0 in virtual memory with the use of paging.

But if I load the program address 0xC0100000 in virtual memory, then is it possible to use a SEGMENT in GDT or something to make the program "think" it is at the start of memory?". This really confuses me.

JamesM's tutorial didn't completely explain how the segments actually work, and from what I can see, he loaded all segments in the GDT with base at start and limit at the end of memory. The only things that changed with kernel and user space segments was the RPL.

So I looked at the OSDEV WIKI GDT page, but I could not find any explanation of how to make a program think it's at the start of memory. WHAT DO I DO???

Hi,

mariuszp wrote:But if I load the program address 0xC0100000 in virtual memory, then is it possible to use a SEGMENT in GDT or something to make the program "think" it is at the start of memory?". This really confuses me.

The actual address is the segment base plus the offset. If the segment base is 0x00000000 and the offset is 0xC0100000 then the actual address will be 0xC0100000 (0x00000000 + 0xC0100000). That's not what you want, but it is common.

If the segment base is 0x40000000 and the offset is 0xC0100000 then the actual address would be 0x100100000 (0x40000000 + 0xC0100000), but that is too big to fit in a 32-bit register, so the CPU ignores the highest bit, and the actual address would therefore be 0x00100000. That is close to what you want.

If the segment base is 0x30F00000 and the offset is 0xC0100000 then the actual address would be 0x00000000.


Cheers,

Brendan

Just to make sure..

So if the program is loaded at 0xC0100000 in virtual memory, and the Ring 3 code/data segments bases are both 0xC0100000, then if the program accessed address 0x8, then it will actually address 0xC0100008?

If so, there's another problem - is it better to load a TSS straight after loading the GDT, or is it better to load it (LOAD it, NOT put in in the GDT) just before the first user-space process is about to be scheduled? Because when I did that like in JamesM's tutorial, it kept triple-faulting. No, I didn't get to ring 3 without the TSS, so I had to load it, but even though interrupts were disabled all the time anyway, it kepttriple-faulting (I disabled interrupts because I didn't load a valid esp0 just yet).

1. Yes.

2. You need to fill SS and ESP0 in the TSS if you want to get back to ring zero at all. Note that masking interrupts does not mask exceptions (ie protection and page faults, etc). Allocate TSS immediately after the GDT for each CPU, as well as the GDT entry. You only need the one TSS (for each CPU) if you are not going to use hardware task switching.

EDIT: Without seeing code, I can only assume the triple fault is probably due to either not setting the RPL of selector used to get to ring 3 properly or not setting the page containing user code to use user privilege (probably along with not setting TSS values).

In that case, since interrupts do not happen WITHOUT loading the TSS, that means the load must be causing the error, yes? Would Bochs tell me the error on triple fault of I do the magic trap just before loading the TSS?

Also, Bochs keeps saying there is a "PANIC". (I downloaded Bochs from the Software Center on Ubuntu). Does anyone know of a (good) BEGINNER tutorial for setting up Bochs? (I used qemu)

If you use Bochs, you'll be able to see a register dump (at least) after running it. If you then disassemble you'll be able to find the cause of the problem. See the bochs website for the documentation.

Also, posting your code that initializes the TSS could be useful.

I mean when I even boot up bochs it panics right away. What do I do?