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From reading the Intel manual I get the impression that CR3 is always reloaded upon ljmp to task gate, even if the new value is the same as the old. That implies a flush of the TLB. I noticed that several people on this forum who do use hardware task switching may also use a hybrid software scheme for thread switching in the same address space. Is that because it is impossible to prevent TLB flushing when using a hardware task jump? Or just efficiency?

Or am I misreading the Intel manual, and when you jump from one task in the same address space as the next task, there is no reloading of CR3?

You know that task gate jump does more than just switch CR3, right?

Obviously I could effect the jump in software, but I'm asking because I wanted to stick to ljmp if at all possible.

Hardware task switching is very inefficient compared to software task switching, for more reasons than TLB flushes. It was even done away with in x86_64 processors. The general recommendation is not to use it at all.

Okay, I'm aware. I didn't ask about that. Moving to software task switching is a project for another day. I don't want to start a discussion about the merits of software vs hardware task switching. That has been hashed out many times. I asked a very specific question about the way Intel i386 hardware task switching works: is there any way to avoid reload of CR3 when jumping to a task gate?

Be quiet. If you use hardware task switching CR3 reloading just one of much idle actions that you do

The other question is should I compare old and new process handles before reloading CR3? EDITED. And like question, should I test TS flag before reloading CR0?