OSDev.org

after i solved the local apic problem,i'm trying to try io apic and AHCI,EHCI and so on.
but just a moment ago, i read http://forum.osdev.org/viewtopic.php?f=1&t=21745
and suddenly i got confused:what's the relationship between IOAPIC,PCI,and the xHCIs?
i have read a few about PCI bus,what i do understand is only i8259.
in a book i found that all the host controllers are on either PCI bus or MP bus,
and io apic is on MP bus,and most host controllers support PCI configuration interface.
Can someone explain the relationship between these things? mostly between PCI and IOAPIC.
or recommand some useful but short articles.
thx

AHCI si an API for SATA controllers, EHCI is a type of USB 2.0 controller, xHCI is the same for USB 3.0, and the I/O APIC is emplyed for interrupt management in MP systems. PCI? PCI devices interrupt

Search the wiki for articles.

Hi

AHCI si an API for SATA controllers, EHCI is a type of USB 2.0 controller, xHCI is the same for USB 3.0, and the I/O APIC is emplyed for interrupt management in MP systems.

i know this.but my question is ,what's the relationship between them? say,does all the interrupt of host controllers pass through IOAPIC?
what's the PCI in OS developer's view?
thx

lemonyii wrote:i know this.but my question is ,what's the relationship between them? say,does all the interrupt of host controllers pass through IOAPIC?

Basically, PCI devices produce interrupts. The IOAPIC receives the interrupt signal and, based on how it is set up, either ignores it or sends it to a destination determined by its settings. The destination processor picks up the interrupt and hands it off to your code, which has to query the device to find out what the device actually wants.
USB controllers are almost always PCI devices and simply act as bridges, passing messages and interrupts from one interface to the other.

and what role does the PCI perform in the view of programmer? just a configuration interface?
say,if i want to drive most of the device, what should i do with PCI? or just program other host controllers?
thx

PCI is a bus. It's read by sending an integer in a specific form (which tells the PCI root bus which bus, device, function and offset to select) to port 0xCF8, and reading another integer from port 0xCFC.

Most other devices (USB, some types of HDDs, graphics cards [AGP and PCIe] and PCI cards) will hang off the PCI bus - they'll be detectable through bus enumeration. To program other host controllers properly, with as few assumptions as possible, you'll need to write a PCI driver.

In the view of a programmer, the PCI bus is a hierarchical collection of buses and devices. You can read information about a valid device (vendor id != 0xFFFF, device id != 0xFFFF) and its state, and know whether it's actually a device, or whether it's another PCI bus with other devices behind it. You can also write the information, and reconfigure it (although as far as I know, this is only used for hot-plug devices and BARS, which tell you the IO and memory ranges the device uses.)

PCI buses have a Header Type field with the value 0x1, PCI devices (including USB buses, etc) have a Header Type with the value 0x2. There's also CardBus devices, which are fairly rare in desktop computers.