Long Mode Paging Problem [solved]
Posted: Fri Apr 09, 2010 9:41 pm
I thought I had recursive paging working in Long Mode, but now it would seem that's only because I confirmed it by looking at linear memdumps in Bochs rather than actually using it in code (and the view page tables in the GUI debugger does not appear to work well).
I think after setting the last entry of a PML4 to itself, page tables will appear at 0xFFFFFF8000000000, directories at 0xFFFFFFFFC0000000, and PDPointers at 0xFFFFFFFFFFE00000, with the PML4 itself being the last addressable page.
After I set up my free page bitmaps, I attempt to create a mapping of all physically addressable (and existing, returned by BIOS/GRUB mmap) memory at 0xFFFFE00000000000.
So, any newly created PML4 entries start at index 0x1C0. Which makes the PDP entries start at 0xFFFFFFFFFFFC0000, then Page Directory Entries (pointing to 2MB pages rather than page tables) at 0xFFFFFFFFF8000000.
Allocation of all these pages seems to work just fine, as I only get a page fault when I try to write to 0xFFFFE00000000070. The error code is 0xB. This indicates that the fault was caused by write and a reserved bit is set somewhere. At the very least, I did notice that writing to the PML4 using the last page location made the dirty bit get set, which is a reserved bit instead in a PML4 (I don't know if that would cause a fault. I doubt it as the next instruction fetch after causing the bit to be set would cause one if that was the case, yes?).
I've spent most of the night wondering if I've lost the ability to add
Any advice would be much appreciated.
I think after setting the last entry of a PML4 to itself, page tables will appear at 0xFFFFFF8000000000, directories at 0xFFFFFFFFC0000000, and PDPointers at 0xFFFFFFFFFFE00000, with the PML4 itself being the last addressable page.
After I set up my free page bitmaps, I attempt to create a mapping of all physically addressable (and existing, returned by BIOS/GRUB mmap) memory at 0xFFFFE00000000000.
So, any newly created PML4 entries start at index 0x1C0. Which makes the PDP entries start at 0xFFFFFFFFFFFC0000, then Page Directory Entries (pointing to 2MB pages rather than page tables) at 0xFFFFFFFFF8000000.
Allocation of all these pages seems to work just fine, as I only get a page fault when I try to write to 0xFFFFE00000000070. The error code is 0xB. This indicates that the fault was caused by write and a reserved bit is set somewhere. At the very least, I did notice that writing to the PML4 using the last page location made the dirty bit get set, which is a reserved bit instead in a PML4 (I don't know if that would cause a fault. I doubt it as the next instruction fetch after causing the bit to be set would cause one if that was the case, yes?).
I've spent most of the night wondering if I've lost the ability to add
Any advice would be much appreciated.