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Ok, after 3 days of searching why my code didn´t worked for a transition ring0->ring3, I now have the problem with the transition ring3->ring0.

I have a segment for data which is cpu specific (like ID, scheduler code ptr, actual thread, and so on) and this segment can only be accessed from ring0 code, but if I come from ring3 code there isn´t anymore a selector in gs and I checked it, my code doesn´t change the selector in gs and as long as I stay in ring0 the selector isn´t changed.

So could it be that when you go into ring3 that every selector which points to a segment which is <ring3 gets the null selector? But when this is so, how can I solve this w/o letting ring3 code access this segment?

GS doesn't change by itself unless you enter V86 mode. When exiting V86 mode, DS, ES, FS and GS will be set to 0. If you don't use V86 mode and GS still changes to 0, you probably have a bug in your code. Anyway, you shouldn't trust user programs to not change GS. Any segment registers that you use (except CS and SS) must be explicitly loaded by your exception handlers. Therefore, each CPU should have it's own GDT which points to different segments for the selector you use to access CPU-specific information.

You are right and wrong

If you go to a ring which is less privileged than the actual one all segment regs which have a higher privilege get the null selector (this was your wrong assumption).

But you are right that every user program can change gs and this is bad, but I also don´t want an extra gdt for every cpu, but maybe this is the way I have to go.

Ah. I missed this when I read the manual (didn't look at the right page).

You can avoid having a GDT per CPU by reading the CPU number from Local APIC base + 0x23 and using that to find the correct CPU structure.

Now I rewrote my code, but there is still some problem (I think its a locking problem) with allocating the gdt memory.

edit::

There you also have to consider that it could be that the IDs aren´t continuous!