I/O Addresses and the IVT in Real-Address Mode

[TERAX]

I am not exactly sure how to ask this. I mean, I guess there are several different ways that I could.

By default, the real-address mode interrupt vector table's base address is located at 0H. While it can be changed on later x86 processors, on the (for instance) 8086, it cannot be. Yet, scattered throughout the IVT's 1 kilobyte range, there are I/O devices.

I guess the first question would be: What maps hardware to a particular address, and can the assigned addresses be changed? I have searched the internet, but have yet to find a precise answer that clearifies this.

Also, if the I/O devices cannot be mapped elsewhere in memory (and neither can the IVT on early x86 processors), what about those vectors containing I/O devices? Are they rendered unuseable?

[xenos]

I think you are confusing two different address spaces:

• The IVT is located in the first 1kB of memory address space. It is a region in physical memory and can be accessed by memory operations, like MOV with a memory operand.
• The devices you are talking about are located in I/O address space. This is not part of any kind of memory, but a completely different thing. It can be accessed by I/O operations, such as IN or OUT.

Both address spaces are completely separated, so there is no possibility of collisions between them. Just think of two different books: They share the same page numbers, but since they are different objects, there is no problem to have different content on the pages with the same number.

[TERAX]

Oh, okay. I misunderstood. I was thinking that IN and OUT were just special versions of MOV that could only address the lower 64 kilobytes of memory, not that they accessed completely different addresses. You know, that I/O was memory-mapped, not port-mapped.

Anyway, thank you!

[neon]

I think the OP is referring to MMIO devices which use regions mapped into the same physical address space as physical memory. I personally am not certain of the exact steps taken by the system to map these devices so I cannot help there, sorry. Some devices [not all] do, however, provide a way to configure what addresses to use within the physical address space for memory mapped I/O.

The real mode IVT is guaranteed to be 0-0x3ff. While it can be changed via using protected mode, I have never heard of it being possible (nor wise if it was) to relocate a real mode IVT.

[xenos]

@neon: You are of course right that there are also memory mapped I/O devices, but afaik there are none in the first 640kB of physical memory, and the first "memory hole" is video RAM starting at 0xA0000 (which is, of course, nothing but MMIO with a VGA device). So none of them is "scattered throughout the IVT".