2 Stage Boot Loader
Posted: Fri Aug 21, 2009 9:49 pm
I'm re-writing my boot loader to be two stages primarily to avoid the 512 byte limit on the regular sized boot loader. Before I get redirected, I have read this thread and it hasn't helped:
http://forum.osdev.org/viewtopic.php?f= ... ed#p154971
Stages one and two of the boot loader work exactly as expected right up until the very last nasm command at the end of stage two: the far jump. The error I get looks like this:
my stage two code it:
I think the problem might be that I'm trying to read from too many disk sectors without increasing the track... How can I tell how many sectors there are in each track so that I know when to carry over X number of sectors and increase the track amount?
Brodeur235
http://forum.osdev.org/viewtopic.php?f= ... ed#p154971
Stages one and two of the boot loader work exactly as expected right up until the very last nasm command at the end of stage two: the far jump. The error I get looks like this:
Code: Select all
00460046282i[BIOS ] Booting from 0000:7c00
00461184682e[CPU0 ] jump_protected: gate type 0 unsupported
00461184682i[CPU0 ] CPU is in protected mode (active)
00461184682i[CPU0 ] CS.d_b = 16 bit
00461184682i[CPU0 ] SS.d_b = 16 bit
00461184682i[CPU0 ] EFER = 0x00000000
00461184682i[CPU0 ] | RAX=0000000060000011 RBX=000000000000be00
00461184682i[CPU0 ] | RCX=0000000000000000 RDX=0000000000000000
00461184682i[CPU0 ] | RSP=0000000000007e00 RBP=0000000000000000
00461184682i[CPU0 ] | RSI=00000000000e7ed4 RDI=000000000000ffac
00461184682i[CPU0 ] | R8=0000000000000000 R9=0000000000000000
00461184682i[CPU0 ] | R10=0000000000000000 R11=0000000000000000
00461184682i[CPU0 ] | R12=0000000000000000 R13=0000000000000000
00461184682i[CPU0 ] | R14=0000000000000000 R15=0000000000000000
00461184682i[CPU0 ] | IOPL=0 id vip vif ac vm RF nt of df if tf sf zf af PF cf
00461184682i[CPU0 ] | SEG selector base limit G D
00461184682i[CPU0 ] | SEG sltr(index|ti|rpl) base limit G D
00461184682i[CPU0 ] | CS:0000( 0004| 0| 0) 00000000 0000ffff 0 0
00461184682i[CPU0 ] | DS:0000( 0005| 0| 0) 00000000 0000ffff 0 0
00461184682i[CPU0 ] | SS:0000( 0005| 0| 0) 00000000 0000ffff 0 0
00461184682i[CPU0 ] | ES:0000( 0005| 0| 0) 00000000 0000ffff 0 0
00461184682i[CPU0 ] | FS:0000( 0005| 0| 0) 00000000 0000ffff 0 0
00461184682i[CPU0 ] | GS:0000( 0005| 0| 0) 00000000 0000ffff 0 0
00461184682i[CPU0 ] | MSR_FS_BASE:0000000000000000
00461184682i[CPU0 ] | MSR_GS_BASE:0000000000000000
00461184682i[CPU0 ] | RIP=0000000000007e30 (0000000000007e30)
00461184682i[CPU0 ] | CR0=0x60000011 CR1=0x0 CR2=0x0000000000000000
00461184682i[CPU0 ] | CR3=0x00000000 CR4=0x00000000
00461184682i[CPU0 ] >> jmp far 0008:0000b000 : 66EA00B000000800
00461184682e[CPU0 ] exception(): 3rd (13) exception with no resolution, shutdown status is 00h, resetting
00461184682i[SYS ] bx_pc_system_c::Reset(SOFTWARE) called
00461184682i[CPU0 ] cpu software reset
Code: Select all
; declare a "main"
bl_s2_main:
; ensure interrupts are disabled
cli
; ensure the stack is setup correctly
xor ax,ax
mov ss,ax
mov sp,STAGE_TWO_OFFSET
; ensure data segments are correct
xor ax,ax
mov ds,ax
mov es,ax
mov fs,ax
mov gs,ax
; load the kernel
call load_kernel
; load the GDT
lgdt [ BLOC_S2(gdt_descriptor) ]
; enter p_mode
mov eax,cr0
or eax,1
mov cr0,eax
; CODE WORKS PERFECTLY UP TO THIS POINT (NO BOCHS ERRORS AND DBG STATEMENTS WILL OUTPUT FINE HERE)
; jump to kernel
jmp DWORD 0x0008:KERNEL_OFFSET
Brodeur235