Bochs 64-Bit Paging
Posted: Sat Jan 03, 2009 11:20 pm
I'm starting on a 64-bit version of my OS and have succeeded in getting the 64-bit code executed but for some reason, even though all the paging structures are correct and in place, bochs only allows access to a 32-bit virtual address space. I've read through the Intel manuals and I presume that the AMD CPU uses the same structure in 64-bit mode so I am at a loss as to why it doesn't work.
When I execute "info tab" in the bochs debugging console while executing the 64-bit code I only get four entries: (these all point to the same range because I did that for to try and trace this bug/fault)
Here is the NASM code for my paging structures:
When I execute "info tab" in the bochs debugging console while executing the 64-bit code I only get four entries: (these all point to the same range because I did that for to try and trace this bug/fault)
Code: Select all
0x00000000-0x003fffff -> 0x00000000-0x003fffff
0x40000000-0x403fffff -> 0x00000000-0x003fffff
0x80000000-0x803fffff -> 0x00000000-0x003fffff
0xc0000000-0xc03fffff -> 0x00000000-0x003fffff
Code: Select all
...
ALIGN 0x1000
_gpInitial_PML4: ; Page Map Level 4
dq _gpInitial_PDP + 3 ; Identity Map Low 4Mb
times 510 dq 0
dq _gpInitial_PDP + 3 ; Also Map to 0xFFFF8000 00000000
_gpInitial_PDP: ; Page Directory Pointer Table
times 512 dq _gpInitial_PD + 3
; times 510 dq 0
; dq _gpInitial_PD + 3
_gpInitial_PD: ; Page Directory
dq _gpInitial_PT1 + 3
dq _gpInitial_PT2 + 3
times 510 dq 0
_gpInitial_PT1: ; Page Table 1
%assign i 0
%rep 512
dq i*4096+3
%assign i i+1
%endrep
_gpInitial_PT2: ; Page Table 2
%assign i 512
%rep 512
dq i*4096+3
%assign i i+1
%endrep
