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DEC 21140
Posted: Sat Nov 29, 2008 8:51 pm
by Troy Martin
I have a reference manual for the DEC 21140 10/100Mbps ethernet controller, but I have no idea what I/O ports the registers are mapped to. Does anyone have an idea on what the base address the registers are at?
Thanks,
Troy
Re: DEC 21140
Posted: Sat Nov 29, 2008 8:59 pm
by OrOS
Its a standard PCI device, it should be in BAR0. I looked into these awhile ago...I think the base address is 0xfc80
Re: DEC 21140
Posted: Sat Nov 29, 2008 9:12 pm
by Troy Martin
Thanks, now I just need to figure out how to use the thing. That manual is harder to read than binary.
Re: DEC 21140
Posted: Sun Nov 30, 2008 12:33 am
by 01000101
Basic overview of most NIC programming.
* get the BAR0 and save that as the IO base address
* get the Interrupt number from the PCI config space
* disable interrupts using the base + offset (to Interrupt Mask Register or similar)
* Perform a hardware reset on the card, wait till finished, and re-disable interrupts for the chipset.
* setup descriptor registers (or raw ring buffer) and save their addresses to the appropriate Rx/Tx registers on the card
* enable Rx/Tx operations
* clear (errored?) pending interrupts in the ISR (or similar) by writing all 1's to the register
* enable interrupts
I don't know how helpful that will be, but I find that to be the general code-path for Ethernet controllers.
Re: DEC 21140
Posted: Sun Nov 30, 2008 12:39 am
by OrOS
Wiki that!