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Hi,

I am currently writing a kernel which is to use a separate linear address space (i.e. a different page directory) for each application. All over the internet tutorials say this allows applications to appear as if they are the only process on the machine. This is all well and good, but wouldnt changing the page directory for the new application mean that the GDT and IDT would stop working, as these memory locations are specified by linear addresses? If so, does this mean the GDT and IDT need to be present in the application's linear address space?

andypatterson wrote:Hi,

I am currently writing a kernel which is to use a separate linear address space (i.e. a different page directory) for each application. All over the internet tutorials say this allows applications to appear as if they are the only process on the machine. This is all well and good, but wouldnt changing the page directory for the new application mean that the GDT and IDT would stop working, as these memory locations are specified by linear addresses? If so, does this mean the GDT and IDT need to be present in the application's linear address space?

The GDTR and IDTR specify physical memory locations (which are no affected by any form of paging). The descriptors in the GDT and IDT specify virtual address ranges, to which paging translation is applied. So when you change to a new task (or process), and reload the segment registers from the TSS (if you use hardware multitasking) or some structure maintained by the kernel, the processor accesses memory specified by the GDTR and IDTR registers. I think the GDT and IDT need not be present in the application's address space, but I haven't gotten that far to test that.

ru2aqare wrote: The GDTR and IDTR specify physical memory locations (which are no affected by any form of paging).

you are contradicting yourself

http://forum.osdev.org/viewtopic.php?p=136854#p136854

ru2aqare wrote: The GDTR contains the linear address and the limit of the GDT.

andypatterson wrote:Hi,

I am currently writing a kernel which is to use a separate linear address space (i.e. a different page directory) for each application. All over the internet tutorials say this allows applications to appear as if they are the only process on the machine. This is all well and good, but wouldnt changing the page directory for the new application mean that the GDT and IDT would stop working, as these memory locations are specified by linear addresses? If so, does this mean the GDT and IDT need to be present in the application's linear address space?

You must map GDT and IDT into all virtual address spaces with same addresses. The kernel and all its global structures must are placed in global memory region(s).

geppy wrote:

ru2aqare wrote: The GDTR and IDTR specify physical memory locations (which are no affected by any form of paging).

you are contradicting yourself

http://forum.osdev.org/viewtopic.php?p=136854#p136854

ru2aqare wrote: The GDTR contains the linear address and the limit of the GDT.

Sorry about that. I checked the Intel Manuals and they state that the GDTR contains linear addresses. My bad.

You don't need to map the same tables to every address space. It may even be worth it to not do so. Like if you have a different TSS per address space, you would give each separate address space a separate I/O permission bitmap, so you can regulate port accesses on a per-process basis. You can use different IDTs to have some exceptions be handled in userland (like the overflow and bound exceptions, emulating *nix' int 0x80). And for the Segmentation fans, you can have a different GDT for programs that wish to use both segmentation and paging at the same time too.