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hello folkes.

after some research i found that instantly after enabling the paging bit in cr0, cpu tries to access the adress which is the phys adress of my kernel. that is bad because i want to have the kernel at virt adress elsewhere.

instantly after Cr0 = Cr0 | 0x80000000 i get a GPF, even if the next instruction is HLT (interrupts disabled).

do you have any ideas?

Thanx in advance,
Adrian.

Have you read the section on paging in the Intel manual? You need to make sure that:
- you have a valid page directory pointer in CR3 (must be page aligned)
- you have a valid mapping for the location where you're currently running (i.e. you need a valid page table entry for EIP)

PGD is page aligned.

How can I map the kern to virt addr other than the phys addr? Do I have to map the place where it's running even if I'm going to use another adress?

Thanx very much,
Adrian.