OSDev.org

Posted: **Thu Jun 12, 2008 4:38 am**

There is TF(bit 8 ) in 80X86 CPU.
I can't understand its use.
I think it maybe has relations with Int 01h.

Interrupt Jump Table wrote: Int 01 - CPU-generated - SINGLE STEP
Int 01 - CPU-generated (80386+) - DEBUGGING EXCEPTIONS

Volume 3A_ System Programming Guide wrote: TF Trap (bit 8 ) : Set to enable single-step mode for debugging; clear to
disable single-step mode. In single-step mode, the processor generates a
debug exception after each instruction. This allows the execution state of a
program to be inspected after each instruction. If an application program
sets the TF flag using a POPF, POPFD, or IRET instruction, a debug exception
is generated after the instruction that follows the POPF, POPFD, or IRET.

I wrote some code to set TF.

Code: Select all

	pushf
	pop ax
	or ax, 0100h
	push ax
	popf

But nothing happened.

Posted: **Thu Jun 12, 2008 5:03 am**

Hi,

Have you set up an IDT handler for the debug exception (exception 3) which does more than just return to the next instruction?

Cheers,
Adam

Posted: **Thu Jun 12, 2008 2:04 pm**

turning the TF on will tell the cpu to trigger interrupt 0x01 before the instruction is run.

Posted: **Thu Jun 12, 2008 8:28 pm**

I found int 01h's ISR entry point is the same with int 03h's(F000:E819).
I disassemblyed the ISR code.
They only set 0:46B's value.

Code: Select all

push ds
push ax
push cx
mov ax, 40h
mov ds, ax
jmp 0EFBDh
.....
0EFBD:
mov ah, 0FFh
mov [6Bh], ah
pop cx
pop ax
pop ds
iret

I could not found any useful things.

Posted: **Fri Jun 13, 2008 9:15 am**

you have to provide your own ISR routine for it to do anything usefull.

when this gets called you will have on top of stack the cs:ip of the instruction to be executed, which you can modify, etc. its good for single step debugging.

Posted: **Sun Jun 15, 2008 8:14 am**

df wrote:you have to provide your own ISR routine for it to do anything usefull.

when this gets called you will have on top of stack the cs:ip of the instruction to be executed, which you can modify, etc. its good for single step debugging.

What is the number of my own ISR? int 1h or other?

Posted: **Sun Jun 15, 2008 9:28 am**

You can change any Interrupt to whatever you want by changing there entry in the IVT/IDT (Depending on what mode you're in...), so change INT 1 to whatever you want, the point of the TF is to have an interrupt that can give you tailored more targeted debug info for every single operation....
Jules

OSDev.org

Who knows the use of TF(Trap Flag) ?

Who knows the use of TF(Trap Flag) ?